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| author | John Su <john_su@compal.corp-partner.google.com> | 2018-06-13 14:28:46 +0800 |
|---|---|---|
| committer | Martin Roth <martinroth@google.com> | 2018-06-15 08:14:27 +0000 |
| commit | 31ff06a2da7380ecfe56365992d013b8ad0f7760 (patch) | |
| tree | 9960338dc83bd91ea5385138b10c75563ebae8de /src/mainboard/google/poppy/variants/nami/devicetree.cb | |
| parent | 56dfc9375101e63987dba42626cd2ef2bd3badfa (diff) | |
| download | coreboot-31ff06a2da7380ecfe56365992d013b8ad0f7760.tar.xz | |
mb/google/poppy/variants/nami: Update DPTF table from version 1.5
Update dptf.asl and TCC parameters from tuning of the thermal team.
BUG=b:72974136
TEST=Match the result from DPTF UI
Change-Id: Ic0ffc169ad3939cacb46824ed23999c61a23d2c4
Signed-off-by: John Su <john_su@compal.corp-partner.google.com>
Reviewed-on: https://review.coreboot.org/27086
Reviewed-by: Furquan Shaikh <furquan@google.com>
Reviewed-by: Sumeet R Pawnikar <sumeet.r.pawnikar@intel.com>
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Diffstat (limited to 'src/mainboard/google/poppy/variants/nami/devicetree.cb')
| -rw-r--r-- | src/mainboard/google/poppy/variants/nami/devicetree.cb | 2 |
1 files changed, 1 insertions, 1 deletions
diff --git a/src/mainboard/google/poppy/variants/nami/devicetree.cb b/src/mainboard/google/poppy/variants/nami/devicetree.cb index 4d912d3863..d4f262e00a 100644 --- a/src/mainboard/google/poppy/variants/nami/devicetree.cb +++ b/src/mainboard/google/poppy/variants/nami/devicetree.cb @@ -282,7 +282,7 @@ chip soc/intel/skylake register "speed_shift_enable" = "1" - register "tcc_offset" = "10" # TCC of 90C + register "tcc_offset" = "3" # TCC of 97C register "psys_pmax" = "101" # PCH Trip Temperature in degree C |