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| author | Seunghwan Kim <sh_.kim@samsung.com> | 2018-09-03 20:25:50 +0900 |
|---|---|---|
| committer | Furquan Shaikh <furquan@google.com> | 2018-09-06 05:07:08 +0000 |
| commit | c76e53ce30a13f77c0f3282a649ca4bfd84dede8 (patch) | |
| tree | 0659656a43f7c7461bedc1b80189566ed6da78ea /src/mainboard/google/poppy/variants/nautilus/mainboard.c | |
| parent | 6d569e0c6b9a3e16d2a2c7276b26aba163b97dbc (diff) | |
| download | coreboot-c76e53ce30a13f77c0f3282a649ca4bfd84dede8.tar.xz | |
mb/google/poppy/variants/nautilus: Bump VCC_SA voltage offset 75mV
Nautilus-Wifi with m3 AP got a halt issue during CTS test.
Nautilus-Wifi was FCS with Celeron AP first and also its PCB/BOM was
validated only with Celeron. Since Celeron deos not support turbo
boost mode, its steady power demend and lower CPU frequency may not
reflect the potential noise hidden inside the board.
Bumping VCC_SA voltage offset 75mV confirmed works to mitigate the
potential noise coupling to VCC_GT/SA, and we verified this change
makes this issue go away on Nautilus-Wifi board.
Nautilus-LTE doesn't show this issue, since it has 10L PCB, will have
better grounding and less noise/ripple than 8L PCB.
BUG=b:111417632
BRANCH=poppy
TEST=Verified CTS test pass without an issue.
Change-Id: Id13fcc36a5b6ed42620c66f57a7303f30bff1a50
Signed-off-by: Seunghwan Kim <sh_.kim@samsung.com>
Reviewed-on: https://review.coreboot.org/28439
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Furquan Shaikh <furquan@google.com>
Diffstat (limited to 'src/mainboard/google/poppy/variants/nautilus/mainboard.c')
| -rw-r--r-- | src/mainboard/google/poppy/variants/nautilus/mainboard.c | 37 |
1 files changed, 16 insertions, 21 deletions
diff --git a/src/mainboard/google/poppy/variants/nautilus/mainboard.c b/src/mainboard/google/poppy/variants/nautilus/mainboard.c index e51370cfa3..b9f6314d1b 100644 --- a/src/mainboard/google/poppy/variants/nautilus/mainboard.c +++ b/src/mainboard/google/poppy/variants/nautilus/mainboard.c @@ -15,32 +15,16 @@ #include <baseboard/variants.h> #include <chip.h> -#include <gpio.h> #include <device/device.h> +#include <device/pci.h> #include <smbios.h> #include <string.h> #include <variant/sku.h> -uint32_t variant_board_sku(void) -{ - static uint32_t sku_id = SKU_UNKNOWN; - - if (sku_id != SKU_UNKNOWN) - return sku_id; - - /* - * Nautilus uses GPP_B20 to determine SKU - * 0 - Wifi SKU - * 1 - LTE SKU - */ - gpio_input_pulldown(GPP_B20); - if (!gpio_get(GPP_B20)) - sku_id = SKU_0_NAUTILUS; - else - sku_id = SKU_1_NAUTILUS_LTE; - - return sku_id; -} +#define R_PCH_OC_WDT_CTL 0x54 +#define B_PCH_OC_WDT_CTL_FORCE_ALL BIT15 +#define B_PCH_OC_WDT_CTL_EN BIT14 +#define B_PCH_OC_WDT_CTL_UNXP_RESET_STS BIT22 const char *smbios_mainboard_sku(void) { @@ -57,11 +41,22 @@ void variant_devtree_update(void) uint32_t sku_id = variant_board_sku(); struct device *root = SA_DEV_ROOT; config_t *cfg = root->chip_info; + uint16_t abase; + uint32_t val32; switch (sku_id) { case SKU_0_NAUTILUS: /* Disable LTE module */ cfg->usb3_ports[3].enable = 0; + + /* OC_WDT has been enabled in FSP-M by enabling SaOcSupport. + * We should clear it to prevent turning the system off. */ + abase = pci_read_config16(PCH_DEV_PMC, ABASE) & 0xfffc; + val32 = inl(abase + R_PCH_OC_WDT_CTL); + val32 &= ~(B_PCH_OC_WDT_CTL_EN | + B_PCH_OC_WDT_CTL_FORCE_ALL | + B_PCH_OC_WDT_CTL_UNXP_RESET_STS); + outl(val32, abase + R_PCH_OC_WDT_CTL); break; case SKU_1_NAUTILUS_LTE: |