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author | Rizwan Qureshi <rizwan.qureshi@intel.com> | 2018-08-09 18:10:24 +0530 |
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committer | Patrick Georgi <pgeorgi@google.com> | 2018-09-06 10:28:19 +0000 |
commit | 55597ff2799d0028179f0ce84a5c9cfec4971194 (patch) | |
tree | 5f14409f142fc193746edbe2e59bd75c934ab5d9 /src/mainboard/google/poppy/variants/nocturne | |
parent | adfaea5400248a5f729cf29d5bbdaa6d199f1c23 (diff) | |
download | coreboot-55597ff2799d0028179f0ce84a5c9cfec4971194.tar.xz |
soc/intel/common: Add function to set BILD bit in RTC
Add a function to set the Bios Interface Lock Down bit (bit 31)
in RTC Configuration register (0x3400). This bit when set prevents
the top swap enable bit (bit 0) in the RTC BUC register (0x3414)
from being changed.
Change-Id: Iacaeeb0d6cabcf0c2c46a58948457ab832351476
Signed-off-by: Rizwan Qureshi <rizwan.qureshi@intel.com>
Reviewed-on: https://review.coreboot.org/28057
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Aaron Durbin <adurbin@chromium.org>
Diffstat (limited to 'src/mainboard/google/poppy/variants/nocturne')
0 files changed, 0 insertions, 0 deletions