diff options
| author | Furquan Shaikh <furquan@chromium.org> | 2017-06-09 18:41:39 -0700 |
|---|---|---|
| committer | Furquan Shaikh <furquan@google.com> | 2017-06-14 20:29:12 +0200 |
| commit | 296c79c9beb13a2d6741862fb1f0d10ea858e4c7 (patch) | |
| tree | 72334105336c8878ece0f92e66c5e5f36f78104a /src/mainboard/google/poppy | |
| parent | dec6d4e8c74e4bdd53018e6ae505bd56578035c6 (diff) | |
| download | coreboot-296c79c9beb13a2d6741862fb1f0d10ea858e4c7.tar.xz | |
mainboard/google/{poppy,soraka}: Disable unused GSPI1 interface
TEST=Verified that board still boots to OS without any error.
Change-Id: I02d2a6cbcab92766a35993bfd20aaeed4ca22c90
Signed-off-by: Furquan Shaikh <furquan@chromium.org>
Reviewed-on: https://review.coreboot.org/20143
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Paul Menzel <paulepanter@users.sourceforge.net>
Reviewed-by: Martin Roth <martinroth@google.com>
Reviewed-by: Aaron Durbin <adurbin@chromium.org>
Diffstat (limited to 'src/mainboard/google/poppy')
3 files changed, 12 insertions, 12 deletions
diff --git a/src/mainboard/google/poppy/variants/baseboard/devicetree.cb b/src/mainboard/google/poppy/variants/baseboard/devicetree.cb index ad8dfc25ab..abd81be5ff 100644 --- a/src/mainboard/google/poppy/variants/baseboard/devicetree.cb +++ b/src/mainboard/google/poppy/variants/baseboard/devicetree.cb @@ -182,7 +182,7 @@ chip soc/intel/skylake [PchSerialIoIndexI2C4] = PchSerialIoPci, [PchSerialIoIndexI2C5] = PchSerialIoPci, [PchSerialIoIndexSpi0] = PchSerialIoPci, - [PchSerialIoIndexSpi1] = PchSerialIoPci, + [PchSerialIoIndexSpi1] = PchSerialIoDisabled, [PchSerialIoIndexUart0] = PchSerialIoPci, [PchSerialIoIndexUart1] = PchSerialIoDisabled, [PchSerialIoIndexUart2] = PchSerialIoSkipInit, @@ -436,7 +436,7 @@ chip soc/intel/skylake device spi 0 on end end end # GSPI #0 - device pci 1e.3 on end # GSPI #1 + device pci 1e.3 off end # GSPI #1 device pci 1e.4 on end # eMMC device pci 1e.5 off end # SDIO device pci 1e.6 on end # SDCard diff --git a/src/mainboard/google/poppy/variants/baseboard/gpio.c b/src/mainboard/google/poppy/variants/baseboard/gpio.c index ca87fafcaf..803a63100f 100644 --- a/src/mainboard/google/poppy/variants/baseboard/gpio.c +++ b/src/mainboard/google/poppy/variants/baseboard/gpio.c @@ -111,14 +111,14 @@ static const struct pad_config gpio_table[] = { /* B18 : GSPI0_MOSI ==> NC */ PAD_CFG_NC(GPP_B18), #endif - /* B19 : GSPI1_CS# ==> PCH_SPI_FP_CS_L */ - PAD_CFG_NF(GPP_B19, NONE, DEEP, NF1), - /* B20 : GSPI1_CLK ==> PCH_SPI_FP_CLK */ - PAD_CFG_NF(GPP_B20, NONE, DEEP, NF1), - /* B21 : GSPI1_MISO ==> PCH_SPI_FP_MISO */ - PAD_CFG_NF(GPP_B21, NONE, DEEP, NF1), - /* B22 : GSPI1_MOSI ==> PCH_SPI_FP_MOSI */ - PAD_CFG_NF(GPP_B22, NONE, DEEP, NF1), + /* B19 : GSPI1_CS# ==> NC */ + PAD_CFG_NC(GPP_B19), + /* B20 : GSPI1_CLK ==> NC */ + PAD_CFG_NC(GPP_B20), + /* B21 : GSPI1_MISO ==> NC */ + PAD_CFG_NC(GPP_B21), + /* B22 : GSPI1_MOSI ==> NC */ + PAD_CFG_NC(GPP_B22), /* B23 : SM1ALERT# ==> NC */ PAD_CFG_NC(GPP_B23), diff --git a/src/mainboard/google/poppy/variants/soraka/devicetree.cb b/src/mainboard/google/poppy/variants/soraka/devicetree.cb index e57cbd2c3e..5943da633c 100644 --- a/src/mainboard/google/poppy/variants/soraka/devicetree.cb +++ b/src/mainboard/google/poppy/variants/soraka/devicetree.cb @@ -182,7 +182,7 @@ chip soc/intel/skylake [PchSerialIoIndexI2C4] = PchSerialIoPci, [PchSerialIoIndexI2C5] = PchSerialIoPci, [PchSerialIoIndexSpi0] = PchSerialIoPci, - [PchSerialIoIndexSpi1] = PchSerialIoPci, + [PchSerialIoIndexSpi1] = PchSerialIoDisabled, [PchSerialIoIndexUart0] = PchSerialIoPci, [PchSerialIoIndexUart1] = PchSerialIoDisabled, [PchSerialIoIndexUart2] = PchSerialIoSkipInit, @@ -424,7 +424,7 @@ chip soc/intel/skylake device spi 0 on end end end # GSPI #0 - device pci 1e.3 on end # GSPI #1 + device pci 1e.3 off end # GSPI #1 device pci 1e.4 on end # eMMC device pci 1e.5 off end # SDIO device pci 1e.6 on end # SDCard |