summaryrefslogtreecommitdiff
path: root/src/mainboard/google/rambi/chromeos.c
diff options
context:
space:
mode:
authorFurquan Shaikh <furquan@chromium.org>2016-11-15 20:33:29 -0800
committerFurquan Shaikh <furquan@google.com>2016-11-18 04:01:59 +0100
commitcd2afc0df034670a83479aded514b22b99124cf5 (patch)
tree185aa9e1d8dd811a93b90682e250b95bf4ae8cee /src/mainboard/google/rambi/chromeos.c
parentf8a274acf53217129460b5a487396761c174bd54 (diff)
downloadcoreboot-cd2afc0df034670a83479aded514b22b99124cf5.tar.xz
google/chromeec: Add common infrastructure for boot-mode switches
Instead of defining the same functions for reading/clearing boot-mode switches from EC in every mainboard, add a common infrastructure to enable common functions for handling boot-mode switches if GOOGLE_CHROMEEC is being used. Only boards that were not moved to this new infrastructure are those that do not use GOOGLE_CHROMEEC or which rely on some mainboard specific mechanism for reading boot-mode switches. BUG=None BRANCH=None TEST=abuild compiles all boards successfully with and without ChromeOS option. Change-Id: I267aadea9e616464563df04b51a668b877f0d578 Signed-off-by: Furquan Shaikh <furquan@chromium.org> Reviewed-on: https://review.coreboot.org/17449 Tested-by: build bot (Jenkins) Reviewed-by: Julius Werner <jwerner@chromium.org>
Diffstat (limited to 'src/mainboard/google/rambi/chromeos.c')
-rw-r--r--src/mainboard/google/rambi/chromeos.c58
1 files changed, 0 insertions, 58 deletions
diff --git a/src/mainboard/google/rambi/chromeos.c b/src/mainboard/google/rambi/chromeos.c
index 4304179d4b..10e076209d 100644
--- a/src/mainboard/google/rambi/chromeos.c
+++ b/src/mainboard/google/rambi/chromeos.c
@@ -14,19 +14,10 @@
*/
#include <string.h>
-#include <arch/io.h>
#include <bootmode.h>
-#include <device/device.h>
-#include <device/pci.h>
#include <soc/gpio.h>
-#include <vboot/vboot_common.h>
#include <vendorcode/google/chromeos/chromeos.h>
-#if CONFIG_EC_GOOGLE_CHROMEEC
-#include "ec.h"
-#include <ec/google/chromeec/ec.h>
-#endif
-
/* The WP status pin lives on GPIO_SSUS_6 which is pad 36 in the SUS well. */
#define WP_STATUS_PAD 36
@@ -47,55 +38,6 @@ void fill_lb_gpios(struct lb_gpios *gpios)
}
#endif
-int get_lid_switch(void)
-{
-#if CONFIG_EC_GOOGLE_CHROMEEC
- u8 ec_switches = inb(EC_LPC_ADDR_MEMMAP + EC_MEMMAP_SWITCHES);
-
- return !!(ec_switches & EC_SWITCH_LID_OPEN);
-#else
- /* Default to force open. */
- return 1;
-#endif
-}
-
-int get_developer_mode_switch(void)
-{
- return 0;
-}
-
-int get_recovery_mode_switch(void)
-{
-#if CONFIG_EC_GOOGLE_CHROMEEC
- u8 ec_switches = inb(EC_LPC_ADDR_MEMMAP + EC_MEMMAP_SWITCHES);
- u32 ec_events;
-
- /* If a switch is set, we don't need to look at events. */
- if (ec_switches & (EC_SWITCH_DEDICATED_RECOVERY))
- return 1;
-
- /* Else check if the EC has posted the keyboard recovery event. */
- ec_events = google_chromeec_get_events_b();
-
- return !!(ec_events &
- EC_HOST_EVENT_MASK(EC_HOST_EVENT_KEYBOARD_RECOVERY));
-#else
- return 0;
-#endif
-}
-
-int clear_recovery_mode_switch(void)
-{
-#if CONFIG_EC_GOOGLE_CHROMEEC
- const uint32_t kb_rec_mask =
- EC_HOST_EVENT_MASK(EC_HOST_EVENT_KEYBOARD_RECOVERY);
- /* Unconditionally clear the EC recovery request. */
- return google_chromeec_clear_events_b(kb_rec_mask);
-#else
- return 0;
-#endif
-}
-
int get_write_protect_state(void)
{
/*