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author | Brandon Breitenstein <brandon.breitenstein@intel.com> | 2016-07-27 17:34:45 -0700 |
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committer | Martin Roth <martinroth@google.com> | 2016-09-02 18:12:24 +0200 |
commit | c31ba0ef529ef571ea839572f2c701a871cb33d7 (patch) | |
tree | 32b38059ace1ce791edabe57ddd8f4056776258c /src/mainboard/google/reef/romstage.c | |
parent | e96543e1fa3510a735d6de391b89ac350f56d287 (diff) | |
download | coreboot-c31ba0ef529ef571ea839572f2c701a871cb33d7.tar.xz |
drivers/intel/fsp2_0: Make FSP Headers Consumable out of Box
The following patch is based off of the UEFI 2.6 patch. The FSP header files
are temporarily staying in soc/intel/apollolake and FspUpd.h has been relocated
since the other headers expect it to be in the root of an includable directory.
Any struct defines were removed since they are defined in the headers and no
longer need to be explicity declared as struct with the UEFI 2.6 includes.
BUG=chrome-os-partner:54100
BRANCH=none
TEST=confirmed coreboot builds successfully
Change-Id: I10739dca1b6da3f15bd850adf06238f7c51508f7
Signed-off-by: Brandon Breitenstein <brandon.breitenstein@intel.com>#
Signed-off-by: Andrey Petrov <andrey.petrov@intel.com>
Reviewed-on: https://review.coreboot.org/16308
Tested-by: build bot (Jenkins)
Reviewed-by: Aaron Durbin <adurbin@chromium.org>
Diffstat (limited to 'src/mainboard/google/reef/romstage.c')
-rw-r--r-- | src/mainboard/google/reef/romstage.c | 2 |
1 files changed, 1 insertions, 1 deletions
diff --git a/src/mainboard/google/reef/romstage.c b/src/mainboard/google/reef/romstage.c index d7ec5b263b..aa1b18d2b8 100644 --- a/src/mainboard/google/reef/romstage.c +++ b/src/mainboard/google/reef/romstage.c @@ -162,7 +162,7 @@ static int get_mem_sku(void) return gpio_pullup_base2_value(pads, ARRAY_SIZE(pads)); } -void mainboard_memory_init_params(struct FSPM_UPD *memupd) +void mainboard_memory_init_params(FSPM_UPD *memupd) { int mem_sku = get_mem_sku(); |