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authorHung-Te Lin <hungte@chromium.org>2019-03-04 16:48:05 +0800
committerPatrick Georgi <pgeorgi@google.com>2019-03-05 20:52:06 +0000
commite5861828ee4357a3df94a8670da1fe9e628deb47 (patch)
treed1d6fe40fad95ff285c44ef2171626f3833d4450 /src/mainboard/google/reef
parent49a44505637ecfa3a6c1606bc0986e70397966b0 (diff)
downloadcoreboot-e5861828ee4357a3df94a8670da1fe9e628deb47.tar.xz
mainboard: Enable PRESERVE flag in all vboot/chromeos FMD files
For Chrome OS (or vboot), The PRESERVE flags should be applied on following sections: RO_PRESERVE, RO_VPD, RW_PRESERVE, RW_ELOG, RW_NVRAM, RW_SMMSTORE, RW_VPD, RO_FSG (b:116326638), SI_GBE (chromium:936768), SI_PDR (chromium:936768) With the new PRESERVE flag, we don't need RO_PRESERVE and RW_PRESERVE in the future. But it's still no harm to use it if there are multiple sections all needing to be preserved. BUG=chromium:936768 TEST=Builds google/eve and google/kukui inside Chrome OS source tree. Also boots successfully on eve and kukui devices. Change-Id: I6664ae3d955001ed14374e2788d400ba5fb9b7f8 Signed-off-by: Hung-Te Lin <hungte@chromium.org> Reviewed-on: https://review.coreboot.org/c/coreboot/+/31709 Tested-by: build bot (Jenkins) <no-reply@coreboot.org> Reviewed-by: Julius Werner <jwerner@chromium.org>
Diffstat (limited to 'src/mainboard/google/reef')
-rw-r--r--src/mainboard/google/reef/chromeos.fmd10
1 files changed, 5 insertions, 5 deletions
diff --git a/src/mainboard/google/reef/chromeos.fmd b/src/mainboard/google/reef/chromeos.fmd
index f601adc5e3..87eb4e76dc 100644
--- a/src/mainboard/google/reef/chromeos.fmd
+++ b/src/mainboard/google/reef/chromeos.fmd
@@ -2,7 +2,7 @@ FLASH 16M {
WP_RO@0x0 0x400000 {
SI_DESC@0x0 0x1000
IFWI@0x1000 0x1ff000
- RO_VPD@0x200000 0x4000
+ RO_VPD(PRESERVE)@0x200000 0x4000
RO_SECTION@0x204000 0x1fc000 {
FMAP@0x0 0x800
RO_FRID@0x800 0x40
@@ -17,13 +17,13 @@ FLASH 16M {
RW_MRC_CACHE@0x10000 0x10000
RW_VAR_MRC_CACHE@0x20000 0x1000
}
- RW_ELOG@0x21000 0x3000
+ RW_ELOG(PRESERVE)@0x21000 0x3000
RW_SHARED@0x24000 0x4000 {
SHARED_DATA@0x0 0x2000
VBLOCK_DEV@0x2000 0x2000
}
- RW_VPD@0x28000 0x2000
- RW_NVRAM@0x2a000 0x5000
+ RW_VPD(PRESERVE)@0x28000 0x2000
+ RW_NVRAM(PRESERVE)@0x2a000 0x5000
FPF_STATUS@0x2f000 0x1000
}
RW_SECTION_A@0x430000 0x480000 {
@@ -36,7 +36,7 @@ FLASH 16M {
FW_MAIN_B(CBFS)@0x10000 0x46ffc0
RW_FWID_B@0x47ffc0 0x40
}
- SMMSTORE@0xd30000 0x40000
+ SMMSTORE(PRESERVE)@0xd30000 0x40000
RW_LEGACY(CBFS)@0xd70000 0x1c0000
BIOS_UNUSABLE@0xf30000 0x4f000
DEVICE_EXTENSION@0xf7f000 0x80000