google/rikku: Upstream Acer Chromebox CXI2

Migrate google/rikku (Acer Chromebox CXI2) from Chromium tree to
upstream, using google/guado as a baseline.

original source:
branch firmware-rikku-6301.110.B
commit 2e71207 [CHERRY-PICK: broadwell: Update to microcode 0x1F]

TEST=built and booted Linux on rikku with full functionality

blobs required for working image:
VGA BIOS (vgabios.bin)
firmware descriptor (ifd.bin)
Intel ME firmware (me.bin)
MRC (mrc.bin)
external reference code (refcode.elf)

Change-Id: Iba618a0b2cf2d613f6429b3e7606e0b47fa97a4d
Signed-off-by: Matt DeVillier <matt.devillier@gmail.com>
Reviewed-on: https://review.coreboot.org/12802
Tested-by: build bot (Jenkins)
Reviewed-by: Martin Roth <martinroth@google.com>

1 files changed, 88 insertions, 0 deletions

diff --git a/src/mainboard/google/rikku/smihandler.c b/src/mainboard/google/rikku/smihandler.c
new file mode 100644
index 0000000000..c0b818615e
--- /dev/null
+++ b/src/mainboard/google/rikku/smihandler.c
@@ -0,0 +1,88 @@
+/*
+ * This file is part of the coreboot project.
+ *
+ * Copyright (C) 2008-2009 coresystems GmbH
+ * Copyright 2014 Google Inc.
+ *
+ * This program is free software; you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License as published by
+ * the Free Software Foundation; version 2 of the License.
+ *
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
+ * GNU General Public License for more details.
+ */
+
+#include <arch/io.h>
+#include <console/console.h>
+#include <cpu/x86/smm.h>
+#include <soc/pm.h>
+#include <soc/smm.h>
+#include <elog.h>
+#include <ec/google/chromeec/ec.h>
+#include <soc/gpio.h>
+#include <soc/iomap.h>
+#include <soc/nvs.h>
+#include <soc/pm.h>
+#include <soc/smm.h>
+#include <superio/ite/it8772f/it8772f.h>
+#include "onboard.h"
+
+int mainboard_io_trap_handler(int smif)
+{
+	switch (smif) {
+	case 0x99:
+		printk(BIOS_DEBUG, "Sample\n");
+		smm_get_gnvs()->smif = 0;
+		break;
+	default:
+		return 0;
+	}
+
+	/* On success, the IO Trap Handler returns 0
+	 * On failure, the IO Trap Handler returns a value != 0
+	 *
+	 * For now, we force the return value to 0 and log all traps to
+	 * see what's going on.
+	 */
+	return 1;
+}
+
+/* gpi_sts is GPIO 47:32 */
+void mainboard_smi_gpi(u32 gpi_sts)
+{
+}
+
+void mainboard_smi_sleep(u8 slp_typ)
+{
+	/* Disable USB charging if required */
+	switch (slp_typ) {
+	case 3:
+		it8772f_gpio_led(IT8772F_GPIO_DEV, 1 /* set */, 0x01 /* select */,
+			0x01 /* polarity */, 0x01 /* 1=pullup */,
+			0x01 /* output */, 0x00, /* 0=Alternate function */
+			SIO_GPIO_BLINK_GPIO10, IT8772F_GPIO_BLINK_FREQUENCY_1_HZ);
+		break;
+	case 5:
+		it8772f_gpio_led(IT8772F_GPIO_DEV, 1 /* set */, 0x01 /* select */,
+			0x00 /* polarity: non-inverting */, 0x00 /* 0=pulldown */,
+			0x01 /* output */, 0x01 /* 1=Simple IO function */,
+			SIO_GPIO_BLINK_GPIO10, IT8772F_GPIO_BLINK_FREQUENCY_1_HZ);
+		break;
+	default:
+		break;
+	}
+	return;
+}
+
+int mainboard_smi_apmc(u8 apmc)
+{
+	switch (apmc) {
+	case APM_CNT_ACPI_ENABLE:
+		break;
+	case APM_CNT_ACPI_DISABLE:
+		break;
+	}
+	return 0;
+}