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authorFurquan Shaikh <furquan@google.com>2014-07-29 18:47:16 -0700
committerPatrick Georgi <pgeorgi@google.com>2015-03-25 22:31:25 +0100
commit538caba15289471467ed8e7f69d5d74c22dbd590 (patch)
treef9d9536c6695b80b707f9ad5dbd819c5d73d1d3c /src/mainboard/google/rush
parent472e0393eb1a8f212994f7152daa4eb5e8554ef3 (diff)
downloadcoreboot-538caba15289471467ed8e7f69d5d74c22dbd590.tar.xz
rush: Add support for chromeos_ec
BUG=chrome-os-partner:31032 BRANCH=None TEST=Compiles successfully and ec error fixed while booting. Change-Id: I7bb78b8986931407ee67f33e83b9d887bea7ac70 Signed-off-by: Patrick Georgi <pgeorgi@chromium.org> Original-Commit-Id: 5447adb964276b9e13399ac93140ae763a149aad Original-Change-Id: I02172a30863b7b97892289e880c29f2d71220fda Original-Signed-off-by: Furquan Shaikh <furquan@google.com> Original-Reviewed-on: https://chromium-review.googlesource.com/210436 Original-Tested-by: Furquan Shaikh <furquan@chromium.org> Original-Reviewed-by: Aaron Durbin <adurbin@chromium.org> Original-Commit-Queue: Furquan Shaikh <furquan@chromium.org> Reviewed-on: http://review.coreboot.org/8898 Tested-by: build bot (Jenkins) Reviewed-by: Stefan Reinauer <stefan.reinauer@coreboot.org>
Diffstat (limited to 'src/mainboard/google/rush')
-rw-r--r--src/mainboard/google/rush/Kconfig8
-rw-r--r--src/mainboard/google/rush/Makefile.inc2
-rw-r--r--src/mainboard/google/rush/mainboard.c9
3 files changed, 17 insertions, 2 deletions
diff --git a/src/mainboard/google/rush/Kconfig b/src/mainboard/google/rush/Kconfig
index 87e742e964..eaae86ce8c 100644
--- a/src/mainboard/google/rush/Kconfig
+++ b/src/mainboard/google/rush/Kconfig
@@ -23,6 +23,10 @@ config BOARD_SPECIFIC_OPTIONS # dummy
def_bool y
select BOARD_ID_SUPPORT
select CHROMEOS
+ select EC_GOOGLE_CHROMEEC
+ select EC_GOOGLE_CHROMEEC_SPI
+ select EC_SOFTWARE_SYNC
+ select SPI_FLASH
select SOC_NVIDIA_TEGRA132
select MAINBOARD_HAS_BOOTBLOCK_INIT
select VIRTUAL_DEV_SWITCH
@@ -87,4 +91,8 @@ config DRIVER_TPM_I2C_ADDR
hex
default 0x20
+config EC_GOOGLE_CHROMEEC_SPI_BUS
+ hex
+ default 1
+
endif # BOARD_GOOGLE_RUSH
diff --git a/src/mainboard/google/rush/Makefile.inc b/src/mainboard/google/rush/Makefile.inc
index ddf6660a66..59a165336e 100644
--- a/src/mainboard/google/rush/Makefile.inc
+++ b/src/mainboard/google/rush/Makefile.inc
@@ -35,9 +35,7 @@ romstage-y += reset.c
romstage-y += romstage.c
romstage-y += sdram_configs.c
romstage-$(CONFIG_CHROMEOS) += chromeos.c
-romstage-y += ec_dummy.c
ramstage-y += boardid.c
ramstage-y += mainboard.c
ramstage-$(CONFIG_CHROMEOS) += chromeos.c
-ramstage-y += ec_dummy.c
diff --git a/src/mainboard/google/rush/mainboard.c b/src/mainboard/google/rush/mainboard.c
index 6db314fec3..fd8a4699e5 100644
--- a/src/mainboard/google/rush/mainboard.c
+++ b/src/mainboard/google/rush/mainboard.c
@@ -23,6 +23,7 @@
#include <soc/clock.h>
#include <soc/nvidia/tegra132/gpio.h>
#include <soc/nvidia/tegra132/clk_rst.h>
+#include <soc/nvidia/tegra132/spi.h>
#include <soc/addressmap.h>
static struct clk_rst_ctlr *clk_rst = (void *)TEGRA_CLK_RST_BASE;
@@ -84,11 +85,19 @@ static void init_mmc(void)
}
+static void setup_ec_spi(void)
+{
+ struct tegra_spi_channel *spi;
+
+ spi = tegra_spi_init(CONFIG_EC_GOOGLE_CHROMEEC_SPI_BUS);
+}
+
static void mainboard_init(device_t dev)
{
clock_enable_clear_reset(CLK_L_SDMMC4, 0, CLK_U_SDMMC3, 0, 0, 0);
init_mmc();
+ setup_ec_spi();
}
static void mainboard_enable(device_t dev)