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authorFurquan Shaikh <furquan@google.com>2014-04-28 16:44:21 -0700
committerMarc Jones <marc.jones@se-eng.com>2015-01-26 11:41:26 +0100
commit5c4a5105d811ba58b21f6eaad542e178fa0e9ee7 (patch)
treeaec0f8cc0f3d49a97ec3b2219c8bccd5baa37725 /src/mainboard/google/rush
parent4208e0c834fe1e2ed1704418e7170c86e14e141d (diff)
downloadcoreboot-5c4a5105d811ba58b21f6eaad542e178fa0e9ee7.tar.xz
rush: Add support for rush board
Add basic support for rush board BUG=None BRANCH=None TEST=Compiles successfully with soc tegra132 and armv8 arch selected for romstage and ramstage Original-Change-Id: Ica57c68d230e4e0e9916729752395843de188733 Original-Signed-off-by: Furquan Shaikh <furquan@google.com> Original-Reviewed-on: https://chromium-review.googlesource.com/197399 Original-Reviewed-by: Aaron Durbin <adurbin@chromium.org> Original-Commit-Queue: Furquan Shaikh <furquan@chromium.org> Original-Tested-by: Furquan Shaikh <furquan@chromium.org> (cherry picked from commit 06a040dc320d7b04ec0f7e51c1b3987c8f6d80f3) Signed-off-by: Marc Jones <marc.jones@se-eng.com> Change-Id: Ica57c68d230e4e0e9916729752395843de188733 Reviewed-on: http://review.coreboot.org/8041 Tested-by: build bot (Jenkins) Reviewed-by: Furquan Shaikh <furquan@google.com>
Diffstat (limited to 'src/mainboard/google/rush')
-rw-r--r--src/mainboard/google/rush/Kconfig39
-rw-r--r--src/mainboard/google/rush/Makefile.inc22
-rw-r--r--src/mainboard/google/rush/devicetree.cb22
-rw-r--r--src/mainboard/google/rush/mainboard.c35
-rw-r--r--src/mainboard/google/rush/romstage.c30
5 files changed, 148 insertions, 0 deletions
diff --git a/src/mainboard/google/rush/Kconfig b/src/mainboard/google/rush/Kconfig
new file mode 100644
index 0000000000..96a17f8e12
--- /dev/null
+++ b/src/mainboard/google/rush/Kconfig
@@ -0,0 +1,39 @@
+##
+## This file is part of the coreboot project.
+##
+## Copyright 2014 Google Inc.
+##
+## This program is free software; you can redistribute it and/or modify
+## it under the terms of the GNU General Public License as published by
+## the Free Software Foundation; version 2 of the License.
+##
+## This program is distributed in the hope that it will be useful,
+## but WITHOUT ANY WARRANTY; without even the implied warranty of
+## MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
+## GNU General Public License for more details.
+##
+## You should have received a copy of the GNU General Public License
+## along with this program; if not, write to the Free Software
+## Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA
+##
+
+if BOARD_GOOGLE_RUSH
+
+config BOARD_SPECIFIC_OPTIONS # dummy
+ def_bool y
+ select SOC_NVIDIA_TEGRA132
+ select BOARD_ROMSIZE_KB_4096
+
+config MAINBOARD_DIR
+ string
+ default google/rush
+
+config MAINBOARD_PART_NUMBER
+ string
+ default "Rush"
+
+config DRAM_SIZE_MB
+ int
+ default 2048
+
+endif # BOARD_GOOGLE_RUSH
diff --git a/src/mainboard/google/rush/Makefile.inc b/src/mainboard/google/rush/Makefile.inc
new file mode 100644
index 0000000000..94a0e28e6d
--- /dev/null
+++ b/src/mainboard/google/rush/Makefile.inc
@@ -0,0 +1,22 @@
+##
+## This file is part of the coreboot project.
+##
+## Copyright 2014 Google Inc.
+##
+## This program is free software; you can redistribute it and/or modify
+## it under the terms of the GNU General Public License as published by
+## the Free Software Foundation; version 2 of the License.
+##
+## This program is distributed in the hope that it will be useful,
+## but WITHOUT ANY WARRANTY; without even the implied warranty of
+## MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
+## GNU General Public License for more details.
+##
+## You should have received a copy of the GNU General Public License
+## along with this program; if not, write to the Free Software
+## Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA
+##
+
+romstage-y += romstage.c
+
+ramstage-y += mainboard.c \ No newline at end of file
diff --git a/src/mainboard/google/rush/devicetree.cb b/src/mainboard/google/rush/devicetree.cb
new file mode 100644
index 0000000000..73836a4b1c
--- /dev/null
+++ b/src/mainboard/google/rush/devicetree.cb
@@ -0,0 +1,22 @@
+##
+## This file is part of the coreboot project.
+##
+## Copyright 2014 Google Inc.
+##
+## This program is free software; you can redistribute it and/or modify
+## it under the terms of the GNU General Public License as published by
+## the Free Software Foundation; version 2 of the License.
+##
+## This program is distributed in the hope that it will be useful,
+## but WITHOUT ANY WARRANTY; without even the implied warranty of
+## MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
+## GNU General Public License for more details.
+##
+## You should have received a copy of the GNU General Public License
+## along with this program; if not, write to the Free Software
+## Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA
+##
+
+chip soc/nvidia/tegra132
+ device cpu_cluster 0 on end
+end
diff --git a/src/mainboard/google/rush/mainboard.c b/src/mainboard/google/rush/mainboard.c
new file mode 100644
index 0000000000..9b8e354b62
--- /dev/null
+++ b/src/mainboard/google/rush/mainboard.c
@@ -0,0 +1,35 @@
+/*
+ * This file is part of the coreboot project.
+ *
+ * Copyright 2014 Google Inc.
+ *
+ * This program is free software; you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License as published by
+ * the Free Software Foundation; version 2 of the License.
+ *
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
+ * GNU General Public License for more details.
+ *
+ * You should have received a copy of the GNU General Public License
+ * along with this program; if not, write to the Free Software
+ * Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA
+ */
+
+#include <device/device.h>
+#include <boot/coreboot_tables.h>
+
+static void mainboard_init(device_t dev)
+{
+}
+
+static void mainboard_enable(device_t dev)
+{
+ dev->ops->init = &mainboard_init;
+}
+
+struct chip_operations mainboard_ops = {
+ .name = "rush",
+ .enable_dev = mainboard_enable,
+};
diff --git a/src/mainboard/google/rush/romstage.c b/src/mainboard/google/rush/romstage.c
new file mode 100644
index 0000000000..e2b75f6842
--- /dev/null
+++ b/src/mainboard/google/rush/romstage.c
@@ -0,0 +1,30 @@
+/*
+ * This file is part of the coreboot project.
+ *
+ * Copyright 2014 Google Inc.
+ *
+ * This program is free software; you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License as published by
+ * the Free Software Foundation; version 2 of the License.
+ *
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
+ * GNU General Public License for more details.
+ *
+ * You should have received a copy of the GNU General Public License
+ * along with this program; if not, write to the Free Software
+ * Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA
+ */
+
+#include <arch/stages.h>
+#include <cbfs.h>
+#include <console/console.h>
+
+void main(void)
+{
+ void *entry;
+
+ entry = cbfs_load_stage(CBFS_DEFAULT_MEDIA, "fallback/ramstage");
+ stage_exit(entry);
+}