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authorJulius Werner <jwerner@chromium.org>2014-10-20 13:25:21 -0700
committerPatrick Georgi <pgeorgi@google.com>2015-04-08 09:26:14 +0200
commit96195eeb71545b070e37413bfad1520ceca3da54 (patch)
tree4de9b88caa9bb4fd0150aed5df1cee89a82a2a52 /src/mainboard/google/rush
parentdae15a63e426230117b575f9acc504110748e98f (diff)
downloadcoreboot-96195eeb71545b070e37413bfad1520ceca3da54.tar.xz
tegra132: Change all SoC headers to <soc/headername.h> system
This patch aligns tegra132 to the new SoC header include scheme. Also alphabetized headers in affected files since we touch them anyway. BUG=None TEST=Tested with whole series. Compiled Rush_Ryu. Change-Id: I5cdf4008a65db84f15c937ef53aab5e4d3ef24c4 Signed-off-by: Patrick Georgi <pgeorgi@chromium.org> Original-Commit-Id: d5c5c63d7b6399d3eb8a211b15d47829fe93a591 Original-Change-Id: Ifafd4d42d4fb04a1c37e8a5f23877c2b550cf44c Original-Signed-off-by: Julius Werner <jwerner@chromium.org> Original-Reviewed-on: https://chromium-review.googlesource.com/224505 Original-Reviewed-by: Aaron Durbin <adurbin@chromium.org> Reviewed-on: http://review.coreboot.org/9369 Tested-by: build bot (Jenkins) Reviewed-by: Stefan Reinauer <stefan.reinauer@coreboot.org>
Diffstat (limited to 'src/mainboard/google/rush')
-rw-r--r--src/mainboard/google/rush/boardid.c5
-rw-r--r--src/mainboard/google/rush/bootblock.c6
-rw-r--r--src/mainboard/google/rush/chromeos.c2
-rw-r--r--src/mainboard/google/rush/mainboard.c11
-rw-r--r--src/mainboard/google/rush/memlayout.ld2
-rw-r--r--src/mainboard/google/rush/pmic.c2
-rw-r--r--src/mainboard/google/rush/reset.c2
-rw-r--r--src/mainboard/google/rush/romstage.c7
8 files changed, 17 insertions, 20 deletions
diff --git a/src/mainboard/google/rush/boardid.c b/src/mainboard/google/rush/boardid.c
index 67e55ba3fb..7ed2b53ed6 100644
--- a/src/mainboard/google/rush/boardid.c
+++ b/src/mainboard/google/rush/boardid.c
@@ -17,10 +17,9 @@
* Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA
*/
-#include <console/console.h>
-#include <soc/nvidia/tegra132/gpio.h>
-
#include <boardid.h>
+#include <console/console.h>
+#include <soc/gpio.h>
uint8_t board_id(void)
{
diff --git a/src/mainboard/google/rush/bootblock.c b/src/mainboard/google/rush/bootblock.c
index e84a25ef8b..eb61cddf8c 100644
--- a/src/mainboard/google/rush/bootblock.c
+++ b/src/mainboard/google/rush/bootblock.c
@@ -21,13 +21,13 @@
#include <console/console.h>
#include <device/i2c.h>
#include <soc/addressmap.h>
+#include <soc/clk_rst.h>
#include <soc/bootblock.h>
#include <soc/clock.h>
-#include <soc/padconfig.h>
#include <soc/funitcfg.h>
#include <soc/nvidia/tegra/i2c.h>
-#include <soc/nvidia/tegra132/clk_rst.h>
-#include <soc/nvidia/tegra132/spi.h> /* FIXME: move back to soc code? */
+#include <soc/padconfig.h>
+#include <soc/spi.h> /* FIXME: move back to soc code? */
#include "pmic.h"
diff --git a/src/mainboard/google/rush/chromeos.c b/src/mainboard/google/rush/chromeos.c
index 03908c0434..5232344223 100644
--- a/src/mainboard/google/rush/chromeos.c
+++ b/src/mainboard/google/rush/chromeos.c
@@ -21,9 +21,9 @@
#include <console/console.h>
#include <ec/google/chromeec/ec.h>
#include <ec/google/chromeec/ec_commands.h>
+#include <soc/gpio.h>
#include <string.h>
#include <vendorcode/google/chromeos/chromeos.h>
-#include <soc/nvidia/tegra132/gpio.h>
void fill_lb_gpios(struct lb_gpios *gpios)
{
diff --git a/src/mainboard/google/rush/mainboard.c b/src/mainboard/google/rush/mainboard.c
index 846a7ac55f..8ea3f4eb3d 100644
--- a/src/mainboard/google/rush/mainboard.c
+++ b/src/mainboard/google/rush/mainboard.c
@@ -18,17 +18,16 @@
*/
#include <arch/mmu.h>
-#include <device/device.h>
#include <boot/coreboot_tables.h>
-
+#include <device/device.h>
#include <memrange.h>
-#include <soc/clock.h>
-#include <soc/nvidia/tegra132/clk_rst.h>
-#include <soc/nvidia/tegra132/spi.h>
#include <soc/addressmap.h>
-#include <soc/padconfig.h>
+#include <soc/clk_rst.h>
+#include <soc/clock.h>
#include <soc/funitcfg.h>
#include <soc/nvidia/tegra/usb.h>
+#include <soc/padconfig.h>
+#include <soc/spi.h>
static const struct pad_config sdmmc3_pad[] = {
/* MMC3(SDCARD) */
diff --git a/src/mainboard/google/rush/memlayout.ld b/src/mainboard/google/rush/memlayout.ld
index b9def51e74..ead7f47838 100644
--- a/src/mainboard/google/rush/memlayout.ld
+++ b/src/mainboard/google/rush/memlayout.ld
@@ -1 +1 @@
-#include <soc/nvidia/tegra132/memlayout.ld>
+#include <soc/memlayout.ld>
diff --git a/src/mainboard/google/rush/pmic.c b/src/mainboard/google/rush/pmic.c
index 85de2003e7..b016164ccd 100644
--- a/src/mainboard/google/rush/pmic.c
+++ b/src/mainboard/google/rush/pmic.c
@@ -18,13 +18,13 @@
* Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA
*/
+#include <boardid.h>
#include <console/console.h>
#include <delay.h>
#include <device/i2c.h>
#include <stdint.h>
#include <stdlib.h>
-#include <boardid.h>
#include "pmic.h"
#include "reset.h"
diff --git a/src/mainboard/google/rush/reset.c b/src/mainboard/google/rush/reset.c
index f3057cac90..dbaed0d95b 100644
--- a/src/mainboard/google/rush/reset.c
+++ b/src/mainboard/google/rush/reset.c
@@ -18,8 +18,8 @@
*/
#include <arch/io.h>
+#include <soc/gpio.h>
#include <reset.h>
-#include <soc/nvidia/tegra132/gpio.h>
void hard_reset(void)
{
diff --git a/src/mainboard/google/rush/romstage.c b/src/mainboard/google/rush/romstage.c
index e82f5ad034..88b7d382c1 100644
--- a/src/mainboard/google/rush/romstage.c
+++ b/src/mainboard/google/rush/romstage.c
@@ -17,13 +17,12 @@
* Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA
*/
-#include <soc/romstage.h>
-
#include <soc/addressmap.h>
#include <soc/clock.h>
-#include <soc/padconfig.h>
-#include <soc/nvidia/tegra/i2c.h>
#include <soc/funitcfg.h>
+#include <soc/nvidia/tegra/i2c.h>
+#include <soc/padconfig.h>
+#include <soc/romstage.h>
static const struct pad_config padcfgs[] = {
/* SOC_WARM_RESET_L */