diff options
author | Aaron Durbin <adurbin@chromium.org> | 2014-09-17 11:50:46 -0500 |
---|---|---|
committer | Patrick Georgi <pgeorgi@google.com> | 2015-03-28 07:05:16 +0100 |
commit | da1a0778ab27b1b6feffbacaed9aa010b9ab1df1 (patch) | |
tree | 9ecc4a12418b4e9da3ea2fcfd3e42f63a3755c6e /src/mainboard/google/rush | |
parent | 9a9273f0c76f3eb7d05af6239b15c0ac5014326d (diff) | |
download | coreboot-da1a0778ab27b1b6feffbacaed9aa010b9ab1df1.tar.xz |
rush: use generic spin table support
With the generic spin table support in place, use that.
BUG=chrome-os-partner:32082
BRANCH=None
TEST=None
Change-Id: I7c9ebd16cd7d5e938e686df2225c612581382983
Signed-off-by: Patrick Georgi <pgeorgi@chromium.org>
Original-Commit-Id: fb0d79f89e27fcd51cc751a94008b3801f5c6d0b
Original-Signed-off-by: Patrick Georgi <pgeorgi@chromium.org>
Original-Change-Id: Ic9949144ed1e9a952290d50b6726bf5891547896
Original-Signed-off-by: Aaron Durbin <adurbin@chromium.org>
Original-Reviewed-on: https://chromium-review.googlesource.com/218657
Original-Reviewed-by: Furquan Shaikh <furquan@chromium.org>
Reviewed-on: http://review.coreboot.org/9087
Tested-by: build bot (Jenkins)
Reviewed-by: Stefan Reinauer <stefan.reinauer@coreboot.org>
Diffstat (limited to 'src/mainboard/google/rush')
-rw-r--r-- | src/mainboard/google/rush/Kconfig | 2 | ||||
-rw-r--r-- | src/mainboard/google/rush/devicetree.cb | 2 |
2 files changed, 3 insertions, 1 deletions
diff --git a/src/mainboard/google/rush/Kconfig b/src/mainboard/google/rush/Kconfig index 5800261dbf..94cbed1ea7 100644 --- a/src/mainboard/google/rush/Kconfig +++ b/src/mainboard/google/rush/Kconfig @@ -30,7 +30,7 @@ config BOARD_SPECIFIC_OPTIONS # dummy select MAINBOARD_HAS_BOOTBLOCK_INIT select VIRTUAL_DEV_SWITCH select BOARD_ROMSIZE_KB_4096 - + select ARCH_SPINTABLE config MAINBOARD_DIR string diff --git a/src/mainboard/google/rush/devicetree.cb b/src/mainboard/google/rush/devicetree.cb index 66d91ec6a3..98284fc4e6 100644 --- a/src/mainboard/google/rush/devicetree.cb +++ b/src/mainboard/google/rush/devicetree.cb @@ -18,6 +18,8 @@ ## chip soc/nvidia/tegra132 + register "spintable_addr" = "0x80000008" + device cpu_cluster 0 on device cpu 0 on end device cpu 1 on end |