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authorAaron Durbin <adurbin@chromium.org>2016-08-06 13:41:51 -0500
committerAaron Durbin <adurbin@chromium.org>2016-08-09 01:31:59 +0200
commit0c634159a35ff567fc4897df25dddddd181a1a8c (patch)
tree95314a0c45f2a7c8dff4e30d419163b85f45bcee /src/mainboard/google/rush_ryu/gpio.h
parente67cd9ee909e1ac415711fec243a0ca0a47d87fd (diff)
downloadcoreboot-0c634159a35ff567fc4897df25dddddd181a1a8c.tar.xz
mainboard/google/rush_ryu: remove rush_ryu mainboard
The rush_ryu board was a development platform that never made it into a product. Remove it as it's not available to anyone. BUG=chrome-os-partner:55932 Change-Id: Ia3836ff8cade3009730543177a66736ae197572b Signed-off-by: Aaron Durbin <adurbin@chromium.org> Reviewed-on: https://review.coreboot.org/16107 Tested-by: build bot (Jenkins) Reviewed-by: Furquan Shaikh <furquan@google.com> Reviewed-by: Paul Menzel <paulepanter@users.sourceforge.net>
Diffstat (limited to 'src/mainboard/google/rush_ryu/gpio.h')
-rw-r--r--src/mainboard/google/rush_ryu/gpio.h70
1 files changed, 0 insertions, 70 deletions
diff --git a/src/mainboard/google/rush_ryu/gpio.h b/src/mainboard/google/rush_ryu/gpio.h
deleted file mode 100644
index cb4ec4d0a1..0000000000
--- a/src/mainboard/google/rush_ryu/gpio.h
+++ /dev/null
@@ -1,70 +0,0 @@
-/*
- * This file is part of the coreboot project.
- *
- * Copyright 2014 Google Inc.
- *
- * This program is free software; you can redistribute it and/or modify
- * it under the terms of the GNU General Public License as published by
- * the Free Software Foundation; version 2 of the License.
- *
- * This program is distributed in the hope that it will be useful,
- * but WITHOUT ANY WARRANTY; without even the implied warranty of
- * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
- * GNU General Public License for more details.
- */
-
-#ifndef __MAINBOARD_GOOGLE_RUSH_RYU_GPIO_H__
-#define __MAINBOARD_GOOGLE_RUSH_RYU_GPIO_H__
-
-#include <gpio.h>
-#include <base3.h>
-
-/* Board ID definitions. */
-enum {
- BOARD_REV0 = BASE3(0, 0),
- BOARD_REV1 = BASE3(0, 1),
- BOARD_REV2 = BASE3(0, Z),
- BOARD_REV3 = BASE3(1, 0),
- BOARD_REV4 = BASE3(1, 1),
- BOARD_REV5 = BASE3(1, Z),
- BOARD_REV6 = BASE3(Z, 0),
- BOARD_REV7 = BASE3(Z, 1),
- BOARD_REV8 = BASE3(Z, Z),
-
- BOARD_ID_PROTO_0 = BOARD_REV0,
- BOARD_ID_PROTO_1 = BOARD_REV1,
- BOARD_ID_PROTO_3 = BOARD_REV2,
- BOARD_ID_PROTO_4 = BOARD_REV3,
- BOARD_ID_EVT = BOARD_REV4,
- BOARD_ID_DVT = BOARD_REV5,
- BOARD_ID_PVT = BOARD_REV6,
- BOARD_ID_MP = BOARD_REV7,
-};
-
-enum {
- /* Board ID related GPIOS. */
- BD_ID0 = GPIO(Q3),
- BD_ID1 = GPIO(Q4),
- /* LTE modem related GPIOs */
- MODEM_RESET = GPIO(S3),
- MODEM_PWR_ON = GPIO(S4),
- MDM_DET = GPIO(V1),
- /* Warm reset */
- AP_SYS_RESET_L = GPIO(I5),
- /* Write Protect */
- SPI_1V8_WP_L = GPIO(R1),
- WRITE_PROTECT_L = SPI_1V8_WP_L,
- /* Power button - Depending on board id, maybe active high / low */
- BTN_AP_PWR = GPIO(Q0),
- POWER_BUTTON = BTN_AP_PWR,
- /* EC in RW signal */
- EC_IN_RW = GPIO(U4),
-
- /* Panel related GPIOs */
- LCD_EN = GPIO(H5),
- LCD_RST_L = GPIO(H3),
- EN_VDD18_LCD = GPIO(X0),
- EN_VDD_LCD = GPIO(BB6), /* P1/P3 board */
-};
-
-#endif /* __MAINBOARD_GOOGLE_RUSH_RYU_GPIO_H__ */