diff options
| author | Aaron Durbin <adurbin@chromium.org> | 2014-08-13 13:27:14 -0500 |
|---|---|---|
| committer | Patrick Georgi <pgeorgi@google.com> | 2015-03-26 00:27:12 +0100 |
| commit | 65627dd6bd415aa7194a600eb998fe07026d2004 (patch) | |
| tree | 5697a1dc50d95d859405635947bb8b1007c62422 /src/mainboard/google/rush_ryu/romstage.c | |
| parent | 4d6ac8d9d9561762bf349eb553a36c0379ac23a6 (diff) | |
| download | coreboot-65627dd6bd415aa7194a600eb998fe07026d2004.tar.xz | |
ryu: convert hardware initialization to funit API
Use the new funit API to do all the dirty work.
BUG=chrome-os-partner:29981
BRANCH=None
TEST=Built and ran through depthcharge and into recovery just like
before.
Change-Id: I8625a06dd847bd3dcfc3ce5a50a31d6aff0b860f
Signed-off-by: Patrick Georgi <pgeorgi@chromium.org>
Original-Commit-Id: ebc04a174269ae072eda804e172fd24362f417d2
Original-Change-Id: Ief2d81c5569c33a90fc9458d741edef1dcbd8239
Original-Signed-off-by: Aaron Durbin <adurbin@chromium.org>
Original-Reviewed-on: https://chromium-review.googlesource.com/212152
Original-Reviewed-by: Furquan Shaikh <furquan@chromium.org>
Reviewed-on: http://review.coreboot.org/8930
Tested-by: build bot (Jenkins)
Reviewed-by: Stefan Reinauer <stefan.reinauer@coreboot.org>
Diffstat (limited to 'src/mainboard/google/rush_ryu/romstage.c')
| -rw-r--r-- | src/mainboard/google/rush_ryu/romstage.c | 34 |
1 files changed, 16 insertions, 18 deletions
diff --git a/src/mainboard/google/rush_ryu/romstage.c b/src/mainboard/google/rush_ryu/romstage.c index 307c1f7008..f6de3d5b7d 100644 --- a/src/mainboard/google/rush_ryu/romstage.c +++ b/src/mainboard/google/rush_ryu/romstage.c @@ -19,41 +19,39 @@ #include <soc/addressmap.h> #include <soc/clock.h> +#include <soc/funitcfg.h> #include <soc/padconfig.h> #include <soc/nvidia/tegra/i2c.h> #include <soc/romstage.h> -static struct clk_rst_ctlr *clk_rst = (void *)TEGRA_CLK_RST_BASE; - static const struct pad_config padcfgs[] = { /* AP_SYS_RESET_L */ PAD_CFG_GPIO_OUT1(GPIO_PI5, PINMUX_PULL_UP), - /* TPM on I2C3 */ + /* WP_L */ + PAD_CFG_GPIO_INPUT(KB_ROW1, PINMUX_PULL_NONE), +}; + +static const struct pad_config tpm_pads[] = { PAD_CFG_SFIO(CAM_I2C_SCL, PINMUX_INPUT_ENABLE, I2C3), PAD_CFG_SFIO(CAM_I2C_SDA, PINMUX_INPUT_ENABLE, I2C3), - /* EC on I2C2 - pulled to 3.3V */ +}; + +static const struct pad_config ec_i2c_pads[] = { PAD_CFG_SFIO(GEN2_I2C_SCL, PINMUX_OPEN_DRAIN|PINMUX_INPUT_ENABLE, I2C2), PAD_CFG_SFIO(GEN2_I2C_SDA, PINMUX_OPEN_DRAIN|PINMUX_INPUT_ENABLE, I2C2), - /* WP_L */ - PAD_CFG_GPIO_INPUT(KB_ROW1, PINMUX_PULL_NONE), }; -static void configure_clocks(void) -{ - /* TPM on I2C3 */ - clock_enable_clear_reset(0, 0, CLK_U_I2C3, 0, 0, 0); - clock_configure_i2c_scl_freq(i2c3, PLLP, 400); - - /* EC on I2C2 */ - clock_enable_clear_reset(0, CLK_H_I2C2, 0, 0, 0, 0); - clock_configure_i2c_scl_freq(i2c2, PLLP, 100); -} +static const struct funit_cfg funits[] = { + /* TPM on I2C3 @ 400kHz */ + FUNIT_CFG(I2C3, PLLP, 400, tpm_pads, ARRAY_SIZE(tpm_pads)), + /* EC on I2C2 - pulled to 3.3V @ 100kHz */ + FUNIT_CFG(I2C2, PLLP, 100, ec_i2c_pads, ARRAY_SIZE(ec_i2c_pads)), +}; void romstage_mainboard_init(void) { - configure_clocks(); - /* Bring up controller interfaces for ramstage loading. */ + soc_configure_funits(funits, ARRAY_SIZE(funits)); soc_configure_pads(padcfgs, ARRAY_SIZE(padcfgs)); /* TPM */ |