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| author | Duncan Laurie <dlaurie@chromium.org> | 2013-10-02 16:10:54 -0700 |
|---|---|---|
| committer | Marc Jones <marc.jones@se-eng.com> | 2014-08-29 06:48:01 +0200 |
| commit | ddc3e42c2267fe175dcc28e38f53f0adecf1aa4e (patch) | |
| tree | 66326a007407b0efcdcef7121a64f6a0263d2d57 /src/mainboard/google/samus/Kconfig | |
| parent | ca436cb247a78b234feb7975575883bdcbabc348 (diff) | |
| download | coreboot-ddc3e42c2267fe175dcc28e38f53f0adecf1aa4e.tar.xz | |
samus: Add coreboot board
Add the coreboot board files for samus
- Based on Bolt
- GPIO setup based on 0.91 schematic
- Support both memory types
- No HDA verb table for this platform
- Some GPIO interrupts are shared and need to be passed to OS
Change-Id: I8dbd7639456c631a0115b03a493d94b5e2361ab5
Signed-off-by: Duncan Laurie <dlaurie@chromium.org>
Reviewed-on: https://chromium-review.googlesource.com/171694
Reviewed-by: Aaron Durbin <adurbin@chromium.org>
(cherry picked from commit 249a74c628264e3d4ce754803ede31238404b4d5)
Signed-off-by: Isaac Christensen <isaac.christensen@se-eng.com>
Reviewed-on: http://review.coreboot.org/6775
Tested-by: build bot (Jenkins)
Reviewed-by: Edward O'Callaghan <eocallaghan@alterapraxis.com>
Reviewed-by: Stefan Reinauer <stefan.reinauer@coreboot.org>
Diffstat (limited to 'src/mainboard/google/samus/Kconfig')
| -rw-r--r-- | src/mainboard/google/samus/Kconfig | 59 |
1 files changed, 59 insertions, 0 deletions
diff --git a/src/mainboard/google/samus/Kconfig b/src/mainboard/google/samus/Kconfig new file mode 100644 index 0000000000..2483a56c53 --- /dev/null +++ b/src/mainboard/google/samus/Kconfig @@ -0,0 +1,59 @@ +if BOARD_GOOGLE_SAMUS + +config BOARD_SPECIFIC_OPTIONS # dummy + def_bool y + select CPU_INTEL_SOCKET_RPGA989 + select NORTHBRIDGE_INTEL_HASWELL + select SOUTHBRIDGE_INTEL_LYNXPOINT + select INTEL_LYNXPOINT_LP + select BOARD_ROMSIZE_KB_8192 + select EC_GOOGLE_CHROMEEC + select EC_SOFTWARE_SYNC + select VIRTUAL_DEV_SWITCH + select HAVE_ACPI_TABLES + select HAVE_OPTION_TABLE + select HAVE_ACPI_RESUME + select MMCONF_SUPPORT + select HAVE_SMI_HANDLER + select MAINBOARD_HAS_CHROMEOS + select EXTERNAL_MRC_BLOB + select MONOTONIC_TIMER_MSR + select MAINBOARD_HAS_NATIVE_VGA_INIT + +config VBOOT_RAMSTAGE_INDEX + hex + default 0x2 + +config MAINBOARD_DIR + string + default google/samus + +config MAINBOARD_PART_NUMBER + string + default "Samus" + +config MMCONF_BASE_ADDRESS + hex + default 0xf0000000 + +config IRQ_SLOT_COUNT + int + default 18 + +config MAX_CPUS + int + default 8 + +config VGA_BIOS_FILE + string + default "pci8086,0166.rom" + +config HAVE_IFD_BIN + bool + default n + +config HAVE_ME_BIN + bool + default n + +endif |