diff options
| author | Duncan Laurie <dlaurie@chromium.org> | 2014-06-10 10:06:46 -0700 |
|---|---|---|
| committer | Marc Jones <marc.jones@se-eng.com> | 2015-01-09 07:43:21 +0100 |
| commit | a416f212dcf57e33d633516bf39ca1a9e97848e6 (patch) | |
| tree | 45f83c49fe030f054d3582308366c4284e68dce8 /src/mainboard/google/samus/spd | |
| parent | dbadb1dd634c8c9419215ade0666a7fb69a4447b (diff) | |
| download | coreboot-a416f212dcf57e33d633516bf39ca1a9e97848e6.tar.xz | |
samus: Updates for P2 board
- RAM ID3 moved to GPIO65 to avoid Top Block Swap strap on GPIO66
- LTE_POWER_ON connection removed
BUG=chrome-os-partner:29502
BRANCH=None
TEST=none yet, preparing for new board
Original-Change-Id: I521fe963cbed57ef5f56cfb0e89aec50bfc48b21
Original-Signed-off-by: Duncan Laurie <dlaurie@chromium.org>
Original-Reviewed-on: https://chromium-review.googlesource.com/203186
Original-Reviewed-by: Aaron Durbin <adurbin@chromium.org>
(cherry picked from commit 1eb65e058307a172f0af9c27d2d2d87d1b78c514)
Signed-off-by: Marc Jones <marc.jones@se-eng.com>
Change-Id: Ibf16dcfd83242c487232f34a310c9f6b2cb69314
Reviewed-on: http://review.coreboot.org/8131
Tested-by: build bot (Jenkins)
Reviewed-by: Stefan Reinauer <stefan.reinauer@coreboot.org>
Diffstat (limited to 'src/mainboard/google/samus/spd')
| -rw-r--r-- | src/mainboard/google/samus/spd/spd.h | 2 |
1 files changed, 1 insertions, 1 deletions
diff --git a/src/mainboard/google/samus/spd/spd.h b/src/mainboard/google/samus/spd/spd.h index 77540af9f3..82e4f8d8a2 100644 --- a/src/mainboard/google/samus/spd/spd.h +++ b/src/mainboard/google/samus/spd/spd.h @@ -36,7 +36,7 @@ #define SPD_GPIO_BIT0 67 #define SPD_GPIO_BIT1 68 #define SPD_GPIO_BIT2 69 -#define SPD_GPIO_BIT3 66 +#define SPD_GPIO_BIT3 65 struct pei_data; void mainboard_fill_spd_data(struct pei_data *pei_data); |