diff options
| author | Duncan Laurie <dlaurie@chromium.org> | 2014-09-18 12:56:04 -0700 |
|---|---|---|
| committer | Patrick Georgi <pgeorgi@google.com> | 2015-04-02 17:27:35 +0200 |
| commit | f6d7baa8fa31a87e4a6f47fc3da82fc093f114a3 (patch) | |
| tree | e716d6bac97ef57285805168bc39a5ce67ef9cf0 /src/mainboard/google/samus | |
| parent | 60e6bf80dbad367250b19374e8b9d155cdb3fe90 (diff) | |
| download | coreboot-f6d7baa8fa31a87e4a6f47fc3da82fc093f114a3.tar.xz | |
samus: Ensure PD controller is in RO mode for recovery
In order to not break FAFT, and to have a quicker recovery
mode boot, reboot the PD controller into RO image in romstage.
This is done before the EC since rebooting the EC into RO will
also reboot the host.
BUG=chrome-os-partner:30079
BRANCH=none
TEST=boot samus EVT into recovery with 'dut-control power_state:rec'
and ensure that the PD controller is rebooted to RO in romstage.
Change-Id: Ieb51717c17fdcbda7aa63b6a9404959e8736c08f
Signed-off-by: Stefan Reinauer <reinauer@chromium.org>
Original-Commit-Id: 19237f6a338fa1c593867d8dfda1edcd376878af
Original-Change-Id: I633f51afc382a7faab825c15618c0bc7566c4395
Original-Signed-off-by: Duncan Laurie <dlaurie@chromium.org>
Original-Reviewed-on: https://chromium-review.googlesource.com/218904
Original-Reviewed-by: Aaron Durbin <adurbin@chromium.org>
Reviewed-on: http://review.coreboot.org/9205
Tested-by: build bot (Jenkins)
Reviewed-by: Patrick Georgi <pgeorgi@google.com>
Diffstat (limited to 'src/mainboard/google/samus')
| -rw-r--r-- | src/mainboard/google/samus/romstage.c | 3 |
1 files changed, 2 insertions, 1 deletions
diff --git a/src/mainboard/google/samus/romstage.c b/src/mainboard/google/samus/romstage.c index 44d712e69e..ca43b81bf6 100644 --- a/src/mainboard/google/samus/romstage.c +++ b/src/mainboard/google/samus/romstage.c @@ -43,7 +43,8 @@ void mainboard_romstage_entry(struct romstage_params *rp) printk(BIOS_INFO, "MLB: board version %d\n", google_chromeec_get_board_version()); - /* Ensure the EC is in the right mode for recovery */ + /* Ensure the EC and PD are in the right mode for recovery */ + google_chromeec_early_pd_init(); google_chromeec_early_init(); /* Initialize GPIOs */ |