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authorJohn Su <john_su@compal.corp-partner.google.com>2019-02-11 17:35:24 +0800
committerPatrick Georgi <pgeorgi@google.com>2019-02-13 13:03:53 +0000
commit025c575750f24b0815393f090ceb515e41cbba13 (patch)
tree22f6431606a29fe13b5262bed3472e6949b467d9 /src/mainboard/google/sarien
parente0f340054761086e4c329a2f66bb8f5b6e13d7c9 (diff)
downloadcoreboot-025c575750f24b0815393f090ceb515e41cbba13.tar.xz
mb/google/sarien/variants/sarien: Add GPIO H15 for DVT1
Follow b:123342945 to add GPIO H15(BT_RADIO_DIS#) for DVT1. BUG=b:123342945 TEST=Built and tested on sarien system Change-Id: I0caf97f6a2a8abf2914667350c76300733ead1b8 Signed-off-by: John Su <john_su@compal.corp-partner.google.com> Reviewed-on: https://review.coreboot.org/c/31330 Tested-by: build bot (Jenkins) <no-reply@coreboot.org> Reviewed-by: Duncan Laurie <dlaurie@chromium.org>
Diffstat (limited to 'src/mainboard/google/sarien')
-rw-r--r--src/mainboard/google/sarien/variants/sarien/gpio.c2
1 files changed, 1 insertions, 1 deletions
diff --git a/src/mainboard/google/sarien/variants/sarien/gpio.c b/src/mainboard/google/sarien/variants/sarien/gpio.c
index f773265d31..b248e11eca 100644
--- a/src/mainboard/google/sarien/variants/sarien/gpio.c
+++ b/src/mainboard/google/sarien/variants/sarien/gpio.c
@@ -200,7 +200,7 @@ static const struct pad_config gpio_table[] = {
/* M2_SKT2_CFG0 */ PAD_NC(GPP_H12, NONE),
/* M2_SKT2_CFG1 */ PAD_NC(GPP_H13, NONE),
/* M2_SKT2_CFG2 */ PAD_NC(GPP_H14, NONE),
-/* M2_SKT2_CFG3 */ PAD_NC(GPP_H15, NONE),
+/* M2_SKT2_CFG3 */ PAD_CFG_GPO(GPP_H15, 1, DEEP), /* BT_RADIO_DIS# */
/* DDPF_CTRLCLK */ PAD_NC(GPP_H16, NONE),
/* DPPF_CTRLDATA */ PAD_NC(GPP_H17, NONE),
/* CPU_C10_GATE# */ PAD_CFG_NF(GPP_H18, NONE, DEEP, NF1), /* C10_GATE# */