summaryrefslogtreecommitdiff
path: root/src/mainboard/google/sarien
diff options
context:
space:
mode:
authorDuncan Laurie <dlaurie@google.com>2018-11-07 11:36:35 -0700
committerDuncan Laurie <dlaurie@chromium.org>2018-11-08 18:49:35 +0000
commit446082946a796436f738af8c2863c1c28a0ccb01 (patch)
tree90a69456420a7359059acfc5bc7a78ad5db63546 /src/mainboard/google/sarien
parent6bb72e4ab9217d4071330eac512f7cba4728accf (diff)
downloadcoreboot-446082946a796436f738af8c2863c1c28a0ccb01.tar.xz
soc/intel/common: Add option to disable eSPI SMI at runtime
Add an option that will disable eSPI SMI when ACPI mode is enabled, and re-enable eSPI SMI when ACPI mode is disabled. Additionally it ensures eSPI SMI is disabled on the ACPI OS resume path. This allows a mainboard to ensure that the Embedded Controller will not be able to assert SMI at runtime when booted into an ACPI aware operating system. This was tested on a Sarien board with the Wilco EC to ensure that the eSPI SMI enable bit is clear when booted into the OS, and remains clear after resume. Change-Id: Ic305c3498dfa4b8166cfdb070fc404dd4618ba3c Signed-off-by: Duncan Laurie <dlaurie@google.com> Reviewed-on: https://review.coreboot.org/29535 Tested-by: build bot (Jenkins) <no-reply@coreboot.org> Reviewed-by: Aaron Durbin <adurbin@chromium.org> Reviewed-by: Furquan Shaikh <furquan@google.com>
Diffstat (limited to 'src/mainboard/google/sarien')
0 files changed, 0 insertions, 0 deletions