diff options
| author | Rizwan Qureshi <rizwan.qureshi@intel.com> | 2018-12-28 12:29:56 +0530 |
|---|---|---|
| committer | Subrata Banik <subrata.banik@intel.com> | 2018-12-29 04:33:01 +0000 |
| commit | 8ae54188531ddadcb252b7c266c475bf1e462b9b (patch) | |
| tree | c93c7d4abbe6523836a57992606466e8b07c3480 /src/mainboard/google/sarien | |
| parent | fba03208428fd11acc69e0b3b00bf358cc83f7de (diff) | |
| download | coreboot-8ae54188531ddadcb252b7c266c475bf1e462b9b.tar.xz | |
mb/google/hatch: Enable Host Bridge/CSME/PMC/P2SB/SMBus
* Enable host bridge.
* Enable CSME.
* Enable Power Management Controller.
* Enable Primary to Side Band Bridge Controller.
* Enable SmBus Controller.
BUG=b:120914069
BRANCH=None
TEST=code compiles with the changes
Change-Id: I2fbf0ece845a7114ce5ab7f6482a935d9275deee
Signed-off-by: Rizwan Qureshi <rizwan.qureshi@intel.com>
Reviewed-on: https://review.coreboot.org/c/30465
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Shelley Chen <shchen@google.com>
Reviewed-by: Subrata Banik <subrata.banik@intel.com>
Diffstat (limited to 'src/mainboard/google/sarien')
0 files changed, 0 insertions, 0 deletions