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| author | Jett Rink <jettrink@chromium.org> | 2018-12-04 10:22:39 -0700 |
|---|---|---|
| committer | Duncan Laurie <dlaurie@chromium.org> | 2018-12-05 17:06:22 +0000 |
| commit | 42d090a2cefafb1998ce15749d2ac6c18f91b1dc (patch) | |
| tree | 3ef82736fb22638db05d7561f2218743cc2f9bd9 /src/mainboard/google/sarien | |
| parent | c438bcd5906bc04573073c6b2d88027780405491 (diff) | |
| download | coreboot-42d090a2cefafb1998ce15749d2ac6c18f91b1dc.tar.xz | |
mb/google/sarien: Enable ISH
Turn on the ISH in the device tree.
BUG=b:120295222
Change-Id: I0ba08c245d050aebc6eb06055690c422ab9b51c6
Signed-off-by: Jett Rink <jettrink@chromium.org>
Reviewed-on: https://review.coreboot.org/c/30034
Reviewed-by: Duncan Laurie <dlaurie@chromium.org>
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Diffstat (limited to 'src/mainboard/google/sarien')
| -rw-r--r-- | src/mainboard/google/sarien/variants/sarien/devicetree.cb | 1 |
1 files changed, 1 insertions, 0 deletions
diff --git a/src/mainboard/google/sarien/variants/sarien/devicetree.cb b/src/mainboard/google/sarien/variants/sarien/devicetree.cb index 4696d7f840..991e964073 100644 --- a/src/mainboard/google/sarien/variants/sarien/devicetree.cb +++ b/src/mainboard/google/sarien/variants/sarien/devicetree.cb @@ -109,6 +109,7 @@ chip soc/intel/cannonlake device pci 12.0 on end # Thermal Subsystem device pci 12.5 off end # UFS SCS device pci 12.6 off end # GSPI #2 + device pci 13.0 on end # Integrated Sensor Hub device pci 14.0 on chip drivers/usb/acpi register "desc" = ""Root Hub"" |