diff options
| author | Furquan Shaikh <furquan@google.com> | 2020-10-09 08:50:14 -0700 |
|---|---|---|
| committer | Patrick Georgi <pgeorgi@google.com> | 2020-11-02 06:15:06 +0000 |
| commit | edac4ef6d4c25414bc0e6200875d57fff9e3346e (patch) | |
| tree | 2c2477267280bc7e0d90331c57b5dea484a14c1d /src/mainboard/google/sarien | |
| parent | 23e88135bb86361cbd4c260a1a38bb7fda2b2338 (diff) | |
| download | coreboot-edac4ef6d4c25414bc0e6200875d57fff9e3346e.tar.xz | |
mb, soc/intel: Reorganize CNVi device entries in devicetree
This change reorganizes the CNVi device entries in mainboard
devicetree/overridetree and SoC chipset tree to make it consistent
with how other SoC internal PCI devices are represented i.e. without a
chip driver around the SoC controller itself.
Before:
chip drivers/wifi/generic
register "wake" = "..."
device pci xx.y on end
end
After:
device pci xx.y on
chip drivers/wifi/generic
register "wake" = "..."
device generic 0 on end
end
end
Change-Id: I22660047a3afd5994400341de0ca461bbc0634e2
Signed-off-by: Furquan Shaikh <furquan@google.com>
Reviewed-on: https://review.coreboot.org/c/coreboot/+/46865
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Duncan Laurie <dlaurie@chromium.org>
Diffstat (limited to 'src/mainboard/google/sarien')
| -rw-r--r-- | src/mainboard/google/sarien/variants/arcada/devicetree.cb | 10 | ||||
| -rw-r--r-- | src/mainboard/google/sarien/variants/sarien/devicetree.cb | 10 |
2 files changed, 12 insertions, 8 deletions
diff --git a/src/mainboard/google/sarien/variants/arcada/devicetree.cb b/src/mainboard/google/sarien/variants/arcada/devicetree.cb index 3ff9b30637..8562046237 100644 --- a/src/mainboard/google/sarien/variants/arcada/devicetree.cb +++ b/src/mainboard/google/sarien/variants/arcada/devicetree.cb @@ -304,10 +304,12 @@ chip soc/intel/cannonlake end end # USB xHCI device pci 14.1 off end # USB xDCI (OTG) - chip drivers/wifi/generic - register "wake" = "PME_B0_EN_BIT" - device pci 14.3 on end # CNVi wifi - end + device pci 14.3 on + chip drivers/wifi/generic + register "wake" = "PME_B0_EN_BIT" + device generic 0 on end + end + end # CNVi wifi device pci 14.5 off end # SDCard device pci 15.0 on chip drivers/i2c/hid diff --git a/src/mainboard/google/sarien/variants/sarien/devicetree.cb b/src/mainboard/google/sarien/variants/sarien/devicetree.cb index 17d0127ce6..1334749542 100644 --- a/src/mainboard/google/sarien/variants/sarien/devicetree.cb +++ b/src/mainboard/google/sarien/variants/sarien/devicetree.cb @@ -316,10 +316,12 @@ chip soc/intel/cannonlake end end # USB xHCI device pci 14.1 off end # USB xDCI (OTG) - chip drivers/wifi/generic - register "wake" = "PME_B0_EN_BIT" - device pci 14.3 on end # CNVi wifi - end + device pci 14.3 on + chip drivers/wifi/generic + register "wake" = "PME_B0_EN_BIT" + device generic 0 on end + end + end # CNVi wifi device pci 14.5 off end # SDCard device pci 15.0 on chip drivers/i2c/hid |