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| author | Furquan Shaikh <furquan@google.com> | 2013-08-13 16:09:33 -0700 |
|---|---|---|
| committer | Isaac Christensen <isaac.christensen@se-eng.com> | 2014-08-08 19:50:28 +0200 |
| commit | 45f868d34f0116e092672b881c99a2aa0c773244 (patch) | |
| tree | 8cdc8bf721a4a157a846fbf7ee116fb41aa263cd /src/mainboard/google/slippy/gma.c | |
| parent | 42b1c34f7ba94fe2a615e320e126fae10e8de521 (diff) | |
| download | coreboot-45f868d34f0116e092672b881c99a2aa0c773244.tar.xz | |
Falco/Slippy: remove unwanted scratchpad writes
Register range 0x4f000 - 0x4f08f includes scratchpad registers. Fastboot
works fine with these registers removed and graphics is initialized properly
Change-Id: Ic57c526a90619f4a073690440f6c5ac6ca96bf10
Signed-off-by: Furquan Shaikh <furquan@google.com>
Reviewed-on: https://gerrit.chromium.org/gerrit/65755
Reviewed-by: Aaron Durbin <adurbin@chromium.org>
Commit-Queue: Furquan Shaikh <furquan@chromium.org>
Tested-by: Furquan Shaikh <furquan@chromium.org>
(cherry picked from commit 7e7befdc3956cbc28d346545669cb55c566cf3ea)
Signed-off-by: Isaac Christensen <isaac.christensen@se-eng.com>
Reviewed-on: http://review.coreboot.org/6525
Tested-by: build bot (Jenkins)
Diffstat (limited to 'src/mainboard/google/slippy/gma.c')
| -rw-r--r-- | src/mainboard/google/slippy/gma.c | 14 |
1 files changed, 0 insertions, 14 deletions
diff --git a/src/mainboard/google/slippy/gma.c b/src/mainboard/google/slippy/gma.c index f2f93b141c..b38cceda5f 100644 --- a/src/mainboard/google/slippy/gma.c +++ b/src/mainboard/google/slippy/gma.c @@ -188,25 +188,11 @@ static void gma_fui_init(int noisy) io_i915_write32(0x8000298e,CPU_VGACNTRL); io_i915_write32(0x00000000,_DSPASIZE+0xc); io_i915_write32(0x00000000,_DSPBSURF); - io_i915_write32(0x00000000,0x4f008); - io_i915_write32(0x00000000,0x4f008); - io_i915_write32(0x00000000,0x4f008); - io_i915_write32(0x01000001,0x4f040); - io_i915_write32(0x00000000,0x4f044); - io_i915_write32(0x00000000,0x4f048); - io_i915_write32(0x03030000,0x4f04c); - io_i915_write32(0x00000000,0x4f050); - io_i915_write32(0x00000001,0x4f054); - io_i915_write32(0x00000000,0x4f058); - io_i915_write32(0x03450000,0x4f04c); - io_i915_write32(0x45450000,0x4f04c); - io_i915_write32(0x03000400,0x4f000); io_i915_write32( DP_LINK_TRAIN_PAT_1 | DP_LINK_TRAIN_PAT_1_CPT | DP_VOLTAGE_0_4 | DP_PRE_EMPHASIS_0 | DP_PORT_WIDTH_1 | DP_PLL_FREQ_270MHZ | DP_SCRAMBLING_DISABLE_IRONLAKE | DP_SYNC_VS_HIGH |0x00000091,DP_A); io_i915_write32(0x00200090,_FDI_RXA_MISC); io_i915_write32(0x0a000000,_FDI_RXA_MISC); io_i915_write32(0x00000070,0x46408); io_i915_write32(0x04000000,0x42090); - io_i915_write32(0xc0000000,0x4f050); io_i915_write32(0x00000000,0x9840); io_i915_write32(0xa4000000,0x42090); io_i915_write32(0x00001000,SOUTH_DSPCLK_GATE_D); |