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authorPatrick Georgi <pgeorgi@chromium.org>2015-06-22 19:43:18 +0200
committerPatrick Georgi <pgeorgi@google.com>2015-06-30 21:47:22 +0200
commit4d6ad838e77ad37749f11a4013a1d879e6286fee (patch)
tree475cfdfd1652a13deabb611d337fdf79fcd43605 /src/mainboard/google/smaug/boardid.c
parentfd49d6faf98eb45006a20869da798558cea9606e (diff)
downloadcoreboot-4d6ad838e77ad37749f11a4013a1d879e6286fee.tar.xz
google/smaug: add new mainboard
This is an nvidia t210 based board. This includes Chrome OS downstream up to Change-Id: Ic89ed54c. Change-Id: I4d77659f4f2d21b1bbdcfc3467e1a166c02ddd47 Signed-off-by: Patrick Georgi <pgeorgi@chromium.org> Reviewed-on: http://review.coreboot.org/10635 Tested-by: build bot (Jenkins) Reviewed-by: Stefan Reinauer <stefan.reinauer@coreboot.org>
Diffstat (limited to 'src/mainboard/google/smaug/boardid.c')
-rw-r--r--src/mainboard/google/smaug/boardid.c43
1 files changed, 43 insertions, 0 deletions
diff --git a/src/mainboard/google/smaug/boardid.c b/src/mainboard/google/smaug/boardid.c
new file mode 100644
index 0000000000..525d1f1cae
--- /dev/null
+++ b/src/mainboard/google/smaug/boardid.c
@@ -0,0 +1,43 @@
+/*
+ * This file is part of the coreboot project.
+ *
+ * Copyright 2015 Google Inc.
+ *
+ * This program is free software; you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License as published by
+ * the Free Software Foundation; version 2 of the License.
+ *
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
+ * GNU General Public License for more details.
+ *
+ * You should have received a copy of the GNU General Public License
+ * along with this program; if not, write to the Free Software
+ * Foundation, Inc.
+ */
+
+#include <boardid.h>
+#include <console/console.h>
+#include <soc/sdram.h>
+#include <stdlib.h>
+
+#include "gpio.h"
+
+uint8_t board_id(void)
+{
+ static int id = -1;
+
+ if (id < 0) {
+ gpio_t gpio[] = {[1] = BD_ID1, [0] = BD_ID0}; /* ID0 is LSB */
+
+ id = gpio_base3_value(gpio, ARRAY_SIZE(gpio));
+ }
+
+ return id;
+}
+
+uint32_t ram_code(void)
+{
+ return sdram_get_ram_code();
+}