diff options
| author | Tom Warren <twarren@nvidia.com> | 2014-07-15 10:34:19 -0700 |
|---|---|---|
| committer | Marc Jones <marc.jones@se-eng.com> | 2015-03-13 00:09:44 +0100 |
| commit | 2525885576e883f1018c9fb34fde0cce4fcd046a (patch) | |
| tree | 2372d5e522aabe943a35286d8891842082961ce0 /src/mainboard/google/snow | |
| parent | 31818c98afae06ba77df383bfa013f9ede16430d (diff) | |
| download | coreboot-2525885576e883f1018c9fb34fde0cce4fcd046a.tar.xz | |
tegra132: Add code to setup chip operations and mem resources.
With this memory resource, the payload loading code should be
able to create a bounce buffer and load the payload successfully.
Adapted from tegra124 soc.c
BUG=None
BRANCH=None
TEST=Built and booted to ramstage on rush.
Original-Change-Id: I2e336ce93c1b0236104e63d3785f0e3d7d76bb01
Original-Signed-off-by: Tom Warren <twarren@nvidia.com>
Original-Reviewed-on: https://chromium-review.googlesource.com/208121
Original-Reviewed-by: Aaron Durbin <adurbin@chromium.org>
(cherry picked from commit 20765da0b15ee8c35a5bbfe532331fc6b1cef502)
Signed-off-by: Marc Jones <marc.jones@se-eng.com>
Change-Id: I267ced473ad0773b52f889dfa83c65562444c01f
Reviewed-on: http://review.coreboot.org/8644
Tested-by: build bot (Jenkins)
Reviewed-by: Furquan Shaikh <furquan@google.com>
Diffstat (limited to 'src/mainboard/google/snow')
0 files changed, 0 insertions, 0 deletions