diff options
author | Stefan Reinauer <reinauer@chromium.org> | 2013-05-15 14:54:07 -0700 |
---|---|---|
committer | Stefan Reinauer <stefan.reinauer@coreboot.org> | 2013-07-10 20:08:29 +0200 |
commit | dc006c1db4fa3606d657c78cc87dc13d056e970d (patch) | |
tree | 7479203a6e08b0b465a104f64316e687885305f5 /src/mainboard/google/snow | |
parent | 08dc3571463d7226068d4a4c19d453859b148957 (diff) | |
download | coreboot-dc006c1db4fa3606d657c78cc87dc13d056e970d.tar.xz |
ARMv7: De-uboot-ify Exynos5250 GPIO code
The Exynos GPIO code has three different APIs that, unfortunately,
were widely used throughout the code base. This patch is cleaning
up the mess.
Change-Id: I09ccc7819fb892dbace9693c786dacc62f3f8eac
Signed-off-by: Stefan Reinauer <reinauer@google.com>
Signed-off-by: Gabe Black <gabeblack@chromium.org>
Reviewed-on: http://review.coreboot.org/3643
Tested-by: build bot (Jenkins)
Reviewed-by: Stefan Reinauer <stefan.reinauer@coreboot.org>
Diffstat (limited to 'src/mainboard/google/snow')
-rw-r--r-- | src/mainboard/google/snow/chromeos.c | 22 | ||||
-rw-r--r-- | src/mainboard/google/snow/mainboard.c | 12 | ||||
-rw-r--r-- | src/mainboard/google/snow/romstage.c | 33 |
3 files changed, 21 insertions, 46 deletions
diff --git a/src/mainboard/google/snow/chromeos.c b/src/mainboard/google/snow/chromeos.c index 404ed4aecb..2b830a12ff 100644 --- a/src/mainboard/google/snow/chromeos.c +++ b/src/mainboard/google/snow/chromeos.c @@ -23,7 +23,6 @@ #include <ec/google/chromeec/ec_commands.h> #include <string.h> #include <vendorcode/google/chromeos/chromeos.h> - #include <cpu/samsung/exynos5250/cpu.h> #include <cpu/samsung/exynos5250/gpio.h> @@ -32,18 +31,6 @@ enum { ACTIVE_HIGH = 1 }; -enum { - WP_GPIO = 6, - RECMODE_GPIO = 0, - LID_GPIO = 5, - POWER_GPIO = 3 -}; - -static struct exynos5_gpio_part1 *gpio_pt1 = - (struct exynos5_gpio_part1 *)EXYNOS5_GPIO_PART1_BASE; -static struct exynos5_gpio_part2 *gpio_pt2 = - (struct exynos5_gpio_part2 *)EXYNOS5_GPIO_PART2_BASE; - void fill_lb_gpios(struct lb_gpios *gpios) { int count = 0; @@ -51,7 +38,7 @@ void fill_lb_gpios(struct lb_gpios *gpios) /* Write Protect: active low */ gpios->gpios[count].port = EXYNOS5_GPD1; gpios->gpios[count].polarity = ACTIVE_LOW; - gpios->gpios[count].value = s5p_gpio_get_value(&gpio_pt1->d1, WP_GPIO); + gpios->gpios[count].value = gpio_get_value(GPIO_D16); // WP_GPIO strncpy((char *)gpios->gpios[count].name, "write protect", GPIO_MAX_NAME_LENGTH); count++; @@ -67,7 +54,7 @@ void fill_lb_gpios(struct lb_gpios *gpios) /* Lid: active high */ gpios->gpios[count].port = EXYNOS5_GPX3; gpios->gpios[count].polarity = ACTIVE_HIGH; - gpios->gpios[count].value = s5p_gpio_get_value(&gpio_pt2->x3, LID_GPIO); + gpios->gpios[count].value = gpio_get_value(GPIO_X35); // LID_GPIO strncpy((char *)gpios->gpios[count].name, "lid", GPIO_MAX_NAME_LENGTH); count++; @@ -75,7 +62,7 @@ void fill_lb_gpios(struct lb_gpios *gpios) gpios->gpios[count].port = EXYNOS5_GPX1; gpios->gpios[count].polarity = ACTIVE_LOW; gpios->gpios[count].value = - s5p_gpio_get_value(&gpio_pt2->x1, POWER_GPIO); + gpio_get_value(GPIO_X13); // POWER_GPIO strncpy((char *)gpios->gpios[count].name, "power", GPIO_MAX_NAME_LENGTH); count++; @@ -92,7 +79,6 @@ void fill_lb_gpios(struct lb_gpios *gpios) gpios->count = count; printk(BIOS_ERR, "Added %d GPIOS size %d\n", count, gpios->size); - } int get_developer_mode_switch(void) @@ -105,7 +91,7 @@ int get_recovery_mode_switch(void) uint32_t ec_events; /* The GPIO is active low. */ - if (!s5p_gpio_get_value(&gpio_pt1->y1, RECMODE_GPIO)) + if (!gpio_get_value(GPIO_Y10)) // RECMODE_GPIO return 1; ec_events = google_chromeec_get_events_b(); diff --git a/src/mainboard/google/snow/mainboard.c b/src/mainboard/google/snow/mainboard.c index a62f62ca56..250b71fdee 100644 --- a/src/mainboard/google/snow/mainboard.c +++ b/src/mainboard/google/snow/mainboard.c @@ -59,12 +59,12 @@ static void exynos_dp_bridge_setup(void) exynos_pinmux_config(PERIPH_ID_DPHPD, 0); gpio_set_value(dp_pd_l, 1); - gpio_cfg_pin(dp_pd_l, EXYNOS_GPIO_OUTPUT); - gpio_set_pull(dp_pd_l, EXYNOS_GPIO_PULL_NONE); + gpio_cfg_pin(dp_pd_l, GPIO_OUTPUT); + gpio_set_pull(dp_pd_l, GPIO_PULL_NONE); gpio_set_value(dp_rst_l, 0); - gpio_cfg_pin(dp_rst_l, EXYNOS_GPIO_OUTPUT); - gpio_set_pull(dp_rst_l, EXYNOS_GPIO_PULL_NONE); + gpio_cfg_pin(dp_rst_l, GPIO_OUTPUT); + gpio_set_pull(dp_rst_l, GPIO_PULL_NONE); udelay(10); gpio_set_value(dp_rst_l, 1); } @@ -122,7 +122,7 @@ static void backlight_pwm(void) static void backlight_en(void) { - /* * Configure GPIO for LCD_BL_EN */ + /* Configure GPIO for LCD_BL_EN */ gpio_direction_output(GPIO_X30, 1); } @@ -227,6 +227,8 @@ static void mainboard_init(device_t dev) if (dp_tries > MAX_DP_TRIES) printk(BIOS_ERR, "%s: Failed to set up displayport\n", __func__); + + gpio_info(); } static void mainboard_enable(device_t dev) diff --git a/src/mainboard/google/snow/romstage.c b/src/mainboard/google/snow/romstage.c index 0e25def434..a7d6bb037d 100644 --- a/src/mainboard/google/snow/romstage.c +++ b/src/mainboard/google/snow/romstage.c @@ -98,8 +98,8 @@ static void setup_storage(void) if (gpio_direction_output(MMC0_GPIO_PIN, 1)) { printk(BIOS_CRIT, "%s: Unable to power on MMC0.\n", __func__); } - gpio_set_pull(MMC0_GPIO_PIN, EXYNOS_GPIO_PULL_NONE); - gpio_set_drv(MMC0_GPIO_PIN, EXYNOS_GPIO_DRV_4X); + gpio_set_pull(MMC0_GPIO_PIN, GPIO_PULL_NONE); + gpio_set_drv(MMC0_GPIO_PIN, GPIO_DRV_4X); exynos_pinmux_config(PERIPH_ID_SDMMC0, PINMUX_FLAG_8BIT_MODE); /* MMC2: Removable, 4 bit mode, no GPIO. */ @@ -114,30 +114,17 @@ static void setup_graphics(void) static void setup_gpio(void) { - struct exynos5_gpio_part1 *gpio_pt1; - struct exynos5_gpio_part2 *gpio_pt2; + gpio_direction_input(GPIO_D16); // WP_GPIO + gpio_set_pull(GPIO_D16, GPIO_PULL_NONE); - enum { - WP_GPIO = 6, - RECMODE_GPIO = 0, - LID_GPIO = 5, - POWER_GPIO = 3 - }; + gpio_direction_input(GPIO_Y10); // RECMODE_GPIO + gpio_set_pull(GPIO_Y10, GPIO_PULL_NONE); - gpio_pt1 = (struct exynos5_gpio_part1 *)EXYNOS5_GPIO_PART1_BASE; - gpio_pt2 = (struct exynos5_gpio_part2 *)EXYNOS5_GPIO_PART2_BASE; + gpio_direction_input(GPIO_X35); // LID_GPIO + gpio_set_pull(GPIO_X35, GPIO_PULL_NONE); - s5p_gpio_direction_input(&gpio_pt1->d1, WP_GPIO); - s5p_gpio_set_pull(&gpio_pt1->d1, WP_GPIO, EXYNOS_GPIO_PULL_NONE); - - s5p_gpio_direction_input(&gpio_pt1->y1, RECMODE_GPIO); - s5p_gpio_set_pull(&gpio_pt1->y1, RECMODE_GPIO, EXYNOS_GPIO_PULL_NONE); - - s5p_gpio_direction_input(&gpio_pt2->x3, LID_GPIO); - s5p_gpio_set_pull(&gpio_pt2->x3, LID_GPIO, EXYNOS_GPIO_PULL_NONE); - - s5p_gpio_direction_input(&gpio_pt2->x1, POWER_GPIO); - s5p_gpio_set_pull(&gpio_pt2->x1, POWER_GPIO, EXYNOS_GPIO_PULL_NONE); + gpio_direction_input(GPIO_X13); // POWER_GPIO + gpio_set_pull(GPIO_X13, GPIO_PULL_NONE); } static void setup_memory(struct mem_timings *mem, int is_resume) |