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authorHung-Te Lin <hungte@chromium.org>2013-04-29 22:11:22 +0800
committerRonald G. Minnich <rminnich@gmail.com>2013-04-30 05:49:42 +0200
commitbf92b19b2a234d63d88fea6bd55ad83361e18574 (patch)
tree2c0393de5796cb6ec01163df05f3cee36ea103c8 /src/mainboard/google/snow
parent3f73eec4d3ea2bfdbece083dc0b8721e458b46fb (diff)
downloadcoreboot-bf92b19b2a234d63d88fea6bd55ad83361e18574.tar.xz
Google/Snow: Temporary fix for resume failure.
The DDR3 memory initialization (with "mem_reset" set on normal boot) will cause resume to be unstable, especially when X is running. System may show X screen for few seconds, then crash randomly and unable to recover - although text console may still work for a while. Probably caused by corrupted memory pages. 'mem_reset' (which refers to RESET# in DDR3 spec) should be enabled according to DDR3 spec. But it seems that on Exynos 5, memory can be initialized without setting mem_reset for both normal boot and resume - at least no known failure cases are found yet. So this can be a temporary workaround. Verified by booting a Google/Snow device with X Window and ChromeOS, entering browser session with fancy web pages, closing LID to suspend for 5 seconds, then re-opening to resume. Suspend/resume worked as expected. Also tried the "suspend_stress_test" with X running and finished 100 iterations of suspend/resume test without failure. Change-Id: I7185b362ce8b545fe77b35a552245736c89d465e Signed-off-by: Hung-Te Lin <hungte@chromium.org> Reviewed-on: http://review.coreboot.org/3148 Reviewed-by: Paul Menzel <paulepanter@users.sourceforge.net> Tested-by: build bot (Jenkins) Reviewed-by: Ronald G. Minnich <rminnich@gmail.com>
Diffstat (limited to 'src/mainboard/google/snow')
-rw-r--r--src/mainboard/google/snow/romstage.c8
1 files changed, 8 insertions, 0 deletions
diff --git a/src/mainboard/google/snow/romstage.c b/src/mainboard/google/snow/romstage.c
index f131e81c8f..aa3a3405e3 100644
--- a/src/mainboard/google/snow/romstage.c
+++ b/src/mainboard/google/snow/romstage.c
@@ -150,6 +150,14 @@ static void snow_setup_memory(struct mem_timings *mem, int is_resume)
mem->mem_type,
mem->mpll_mdiv,
mem->frequency_mhz);
+
+ /* FIXME Currently memory initialization with mem_reset on normal boot
+ * will cause resume to fail (even if we don't do mem_reset on resume),
+ * and the workaround is to temporarily always enable "is_resume".
+ * This should be removed when the root cause of resume issue is found.
+ */
+ is_resume = 1;
+
if (ddr3_mem_ctrl_init(mem, DMC_INTERLEAVE_SIZE, !is_resume)) {
die("Failed to initialize memory controller.\n");
}