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author | Vladimir Serbinenko <phcoder@gmail.com> | 2016-02-10 02:42:16 +0100 |
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committer | Martin Roth <martinroth@google.com> | 2016-02-12 18:03:08 +0100 |
commit | f004b6b927e88a9e4c984ff0bbc350dbe2bab54d (patch) | |
tree | d786ddb087f4eab509cf1711d28d5fd941e910e6 /src/mainboard/google/stout/devicetree.cb | |
parent | 144eea069726903d157f67a2f886dff4575d9b19 (diff) | |
download | coreboot-f004b6b927e88a9e4c984ff0bbc350dbe2bab54d.tar.xz |
stout: Support native raminit
Change-Id: If64607d40a64ada8cfe4c3ad054be9d6571fc221
Signed-off-by: Vladimir Serbinenko <phcoder@gmail.com>
Reviewed-on: https://review.coreboot.org/13660
Tested-by: build bot (Jenkins)
Reviewed-by: Alexandru Gagniuc <mr.nuke.me@gmail.com>
Diffstat (limited to 'src/mainboard/google/stout/devicetree.cb')
-rw-r--r-- | src/mainboard/google/stout/devicetree.cb | 2 |
1 files changed, 2 insertions, 0 deletions
diff --git a/src/mainboard/google/stout/devicetree.cb b/src/mainboard/google/stout/devicetree.cb index 97db8ae042..6c693ad33c 100644 --- a/src/mainboard/google/stout/devicetree.cb +++ b/src/mainboard/google/stout/devicetree.cb @@ -20,6 +20,8 @@ chip northbridge/intel/sandybridge register "gpu_cpu_backlight" = "0x1155" register "gpu_pch_backlight" = "0x06100610" + register "max_mem_clock_mhz" = "666" + device cpu_cluster 0 on chip cpu/intel/socket_rPGA989 device lapic 0 on end |