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| author | Nico Huber <nico.h@gmx.de> | 2020-03-22 20:12:13 +0100 |
|---|---|---|
| committer | Nico Huber <nico.h@gmx.de> | 2020-03-24 20:36:36 +0000 |
| commit | d07ac8ee13ce7f1af5a9d9a5d2e194ab27b8fb9a (patch) | |
| tree | 018e611167eebe530fe3e56656d8e9adea25c911 /src/mainboard/google/stout | |
| parent | e47132be6601bfd485076d6520e56a8b8ecb0737 (diff) | |
| download | coreboot-d07ac8ee13ce7f1af5a9d9a5d2e194ab27b8fb9a.tar.xz | |
drivers/intel/gma: Ditch `link_frequency_270_mhz` setting
The `link_frequency_270_mhz` setting was originally used by the native
graphics init code for Sandy/Ivy Bridge, which is long gone.
The value of this information (which board had it set) is questionable.
The only board that had an LVDS panel and set it to 0 was the ThinkPad
L520, where native graphics init was never reported to work. Also, the
native graphics init only used it for calculations, but never confi-
gured the hardware to use a specific frequency. A look into the docu-
mentation also doesn't reveal any straps that could be used to confi-
gure it.
Change-Id: Ieceaa13e4529096a8ba9036479fd84969faebd14
Signed-off-by: Nico Huber <nico.h@gmx.de>
Reviewed-on: https://review.coreboot.org/c/coreboot/+/39763
Reviewed-by: Angel Pons <th3fanbus@gmail.com>
Reviewed-by: Alexander Couzens <lynxis@fe80.eu>
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Diffstat (limited to 'src/mainboard/google/stout')
| -rw-r--r-- | src/mainboard/google/stout/devicetree.cb | 1 |
1 files changed, 0 insertions, 1 deletions
diff --git a/src/mainboard/google/stout/devicetree.cb b/src/mainboard/google/stout/devicetree.cb index b9ccbf938c..089aea3bc4 100644 --- a/src/mainboard/google/stout/devicetree.cb +++ b/src/mainboard/google/stout/devicetree.cb @@ -16,7 +16,6 @@ chip northbridge/intel/sandybridge # For native gfx register "gfx.use_spread_spectrum_clock" = "0" - register "gfx.link_frequency_270_mhz" = "1" register "gpu_cpu_backlight" = "0x1155" register "gpu_pch_backlight" = "0x06100610" |