diff options
| author | David Hendricks <dhendrix@chromium.org> | 2015-09-02 18:10:14 -0700 |
|---|---|---|
| committer | Patrick Georgi <pgeorgi@google.com> | 2015-09-08 11:50:50 +0000 |
| commit | 4bd65e1c0cd53802abd3598c03d28b82a11be46d (patch) | |
| tree | 888ea67501c02c7b34972e9f208815c04f45c1aa /src/mainboard/google/veyron | |
| parent | 68957b33ed4f9261bd74217aa58e9e1e08ac2aea (diff) | |
| download | coreboot-4bd65e1c0cd53802abd3598c03d28b82a11be46d.tar.xz | |
rk3288: Allow board-specific APLL (CPU clock) settings
This changes the API to rkclk_configure_cpu() such that we can pass
in the desired APLL frequency in each veyron board's bootblock.c.
Devices with a constrainted form facter (rialto and possibly mickey)
will use this to run firmware at a slower speed to mitigate risk
of thermal issues (due to the RK808, not the RK3288).
BUG=chrome-os-partner:42054
BRANCH=none
TEST=amstan says rialto is noticably cooler (and slower)
Change-Id: I28b332e1d484bd009599944cd9f5cf633ea468dd
Signed-off-by: Patrick Georgi <pgeorgi@chromium.org>
Original-Commit-Id: d10af5e18b4131a00f202272e405bd22eab4caeb
Original-Change-Id: I960cb6ff512c058e72032aa2cbadedde97510631
Original-Signed-off-by: David Hendricks <dhendrix@chromium.org>
Original-Reviewed-on: https://chromium-review.googlesource.com/297190
Original-Reviewed-by: Julius Werner <jwerner@chromium.org>
Reviewed-on: http://review.coreboot.org/11582
Tested-by: build bot (Jenkins)
Reviewed-by: Aaron Durbin <adurbin@chromium.org>
Diffstat (limited to 'src/mainboard/google/veyron')
| -rw-r--r-- | src/mainboard/google/veyron/bootblock.c | 2 |
1 files changed, 1 insertions, 1 deletions
diff --git a/src/mainboard/google/veyron/bootblock.c b/src/mainboard/google/veyron/bootblock.c index ae74972340..e4126a45f9 100644 --- a/src/mainboard/google/veyron/bootblock.c +++ b/src/mainboard/google/veyron/bootblock.c @@ -59,7 +59,7 @@ void bootblock_mainboard_init(void) udelay(175);/* Must wait for voltage to stabilize,2mV/us */ rk808_configure_buck(1, 1400); udelay(100);/* Must wait for voltage to stabilize,2mV/us */ - rkclk_configure_cpu(); + rkclk_configure_cpu(APLL_1800_MHZ); /* i2c1 for tpm */ write32(&rk3288_grf->iomux_i2c1, IOMUX_I2C1); |