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authorDavid Hendricks <dhendrix@chromium.org>2015-01-16 17:42:08 -0800
committerStefan Reinauer <stefan.reinauer@coreboot.org>2015-04-15 16:51:46 +0200
commit25f5778f4a648218b303b6021eae09bf0c450ac0 (patch)
tree75e1c6650b0227a213c616e9f25974632d4df1d7 /src/mainboard/google/veyron_brain
parentd7d50fdd260190fc4d6f2ee084cb43aff0427b1a (diff)
downloadcoreboot-25f5778f4a648218b303b6021eae09bf0c450ac0.tar.xz
brain: remove sdmmc_power_off() in romstage
LDO4 and LDO5 are not turned on with the boot0 and boot1 RK808 strappings that we use on Brain. BUG=none BRANCH=none TEST=built and booted on brain Change-Id: I00393ca54958d9fff926606405edcd84901e4048 Signed-off-by: Stefan Reinauer <reinauer@chromium.org> Original-Commit-Id: c4c1862585fd058a8a9c8237c701b3bbf3b8aa83 Original-Signed-off-by: David Hendricks <dhendrix@chromium.org> Original-Change-Id: I846ef9d67a780cc07414d545524b9ec0b8490cf1 Original-Reviewed-on: https://chromium-review.googlesource.com/241734 Original-Reviewed-by: Julius Werner <jwerner@chromium.org> Reviewed-on: http://review.coreboot.org/9648 Reviewed-by: Paul Menzel <paulepanter@users.sourceforge.net> Tested-by: build bot (Jenkins) Reviewed-by: Marc Jones <marc.jones@se-eng.com>
Diffstat (limited to 'src/mainboard/google/veyron_brain')
-rw-r--r--src/mainboard/google/veyron_brain/romstage.c9
1 files changed, 0 insertions, 9 deletions
diff --git a/src/mainboard/google/veyron_brain/romstage.c b/src/mainboard/google/veyron_brain/romstage.c
index 1eed268fa7..3f9e7aaa4a 100644
--- a/src/mainboard/google/veyron_brain/romstage.c
+++ b/src/mainboard/google/veyron_brain/romstage.c
@@ -77,12 +77,6 @@ static void configure_l2ctlr(void)
write_l2ctlr(l2ctlr);
}
-static void sdmmc_power_off(void)
-{
- rk808_configure_ldo(4, 0); /* VCCIO_SD */
- rk808_configure_ldo(5, 0); /* VCC33_SD */
-}
-
void main(void)
{
#if CONFIG_COLLECT_TIMESTAMPS
@@ -97,9 +91,6 @@ void main(void)
configure_l2ctlr();
tsadc_init();
- /* Need to power cycle SD card to ensure it is properly reset. */
- sdmmc_power_off();
-
/* vdd_log 1200mv is enough for ddr run 666Mhz */
regulate_vdd_log(1200);
#if CONFIG_COLLECT_TIMESTAMPS