diff options
| author | David Hendricks <dhendrix@chromium.org> | 2016-04-18 18:44:09 -0700 |
|---|---|---|
| committer | Patrick Georgi <pgeorgi@google.com> | 2016-05-09 08:47:02 +0200 |
| commit | b4cdd2532c7915ce111fbcef184cf9c01036374d (patch) | |
| tree | cd7e3f9a67d72fa44333cc587fd11f4b083c53d1 /src/mainboard/google/veyron_mickey | |
| parent | bf48fbbcc116b79fa5bfe05db83c354ee87e3843 (diff) | |
| download | coreboot-b4cdd2532c7915ce111fbcef184cf9c01036374d.tar.xz | |
google/veyron_mickey: Increase RO CBFS size by 512 Kb
This change increases the size of RO CBFS by 512 Kb to accommodate new
images added to the INSERT screen.
(This does the same thing as Daisuke's CL:338095, but for Mickey)
BUG=chromium:604412
BRANCH=none
CQ-DEPEND=CL:339495,CL:339511
TEST=emerge-veyron_mickey chromeos-bootimage
Change-Id: Ib58247b2c89e436c6013f3ad59ad1cb80ba14964
Signed-off-by: Patrick Georgi <pgeorgi@chromium.org>
Original-Commit-Id: 897499bea5bd4003466ca7ebabff597e87da2e45
Original-Change-Id: I2cee79b2476fcb5bfb91bf9779f1fe11b4361612
Original-Signed-off-by: David Hendricks <dhendrix@chromium.org>
Original-Reviewed-on: https://chromium-review.googlesource.com/339542
Original-Reviewed-by: Daisuke Nojiri <dnojiri@chromium.org>
Reviewed-on: https://review.coreboot.org/14721
Tested-by: build bot (Jenkins)
Reviewed-by: Stefan Reinauer <stefan.reinauer@coreboot.org>
Diffstat (limited to 'src/mainboard/google/veyron_mickey')
| -rw-r--r-- | src/mainboard/google/veyron_mickey/chromeos.fmd | 6 |
1 files changed, 3 insertions, 3 deletions
diff --git a/src/mainboard/google/veyron_mickey/chromeos.fmd b/src/mainboard/google/veyron_mickey/chromeos.fmd index 9c618e3cdf..fc7cf3b80f 100644 --- a/src/mainboard/google/veyron_mickey/chromeos.fmd +++ b/src/mainboard/google/veyron_mickey/chromeos.fmd @@ -2,9 +2,9 @@ FLASH@0x0 0x400000 { WP_RO@0x0 0x200000 { RO_SECTION@0x0 0x1f0000 { BOOTBLOCK@0 128K - COREBOOT(CBFS)@0x20000 0xe0000 - FMAP@0x100000 0x1000 - GBB@0x101000 0xeef00 + COREBOOT(CBFS)@0x20000 0x160000 + FMAP@0x180000 0x1000 + GBB@0x181000 0x6ef00 RO_FRID@0x1eff00 0x100 } RO_VPD@0x1f0000 0x10000 |