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authorJulius Werner <jwerner@chromium.org>2014-11-24 13:50:46 -0800
committerStefan Reinauer <stefan.reinauer@coreboot.org>2015-04-15 16:27:23 +0200
commit2460a5564f9a5c3c30922a5faba080cedc7b726f (patch)
tree961557018fafd8bdbf67b7e40758f2fa5cb06f6b /src/mainboard/google/veyron_mighty
parent5984aad9c8a0fad5b20db7d03832d3b3510bcfd6 (diff)
downloadcoreboot-2460a5564f9a5c3c30922a5faba080cedc7b726f.tar.xz
veyron: Trigger hard reset (via GPIO) if last reboot was caused by watchdog
Like Nyan, Veyron boards use a GPIO to reset the system so that we can make the accompanying TPM reset secure and unforgeable. The normal kernel reboot driver knows that, but the SoC-internal watchdog doesn't. This patch implements a check for the global reset status register in the early bootblock and triggers a hard_reset() when it matches "first global watchdog reset" or "second global watchdog reset". Seems that the difference between the two is is a choice controlled by wdt_glb_srst_ctrl (unconfirmed), and we want this code to run in both cases. BRANCH=None BUG=chrome-os-partner:33141 TEST=Run 'mem w 0xff800000 0x9' from the command line, watch how you end up in recovery without this patch but can boot normally with it. Change-Id: Ice79648831e1e97d22325711da9e82bbf6bf3c75 Signed-off-by: Stefan Reinauer <reinauer@chromium.org> Original-Commit-Id: 5d7cb52b2c2dcb2fff0bf83fc168439dade4b1b7 Original-Change-Id: I2581bde84f0445c15896060544e9acb60de91c8c Original-Signed-off-by: Julius Werner <jwerner@chromium.org> Original-Reviewed-on: https://chromium-review.googlesource.com/231734 Original-Reviewed-by: David Hendricks <dhendrix@chromium.org> Reviewed-on: http://review.coreboot.org/9629 Tested-by: build bot (Jenkins) Reviewed-by: Marc Jones <marc.jones@se-eng.com>
Diffstat (limited to 'src/mainboard/google/veyron_mighty')
-rw-r--r--src/mainboard/google/veyron_mighty/bootblock.c7
1 files changed, 7 insertions, 0 deletions
diff --git a/src/mainboard/google/veyron_mighty/bootblock.c b/src/mainboard/google/veyron_mighty/bootblock.c
index 1e46ed025c..4536f31069 100644
--- a/src/mainboard/google/veyron_mighty/bootblock.c
+++ b/src/mainboard/google/veyron_mighty/bootblock.c
@@ -21,7 +21,9 @@
#include <arch/io.h>
#include <assert.h>
#include <bootblock_common.h>
+#include <console/console.h>
#include <delay.h>
+#include <reset.h>
#include <soc/clock.h>
#include <soc/i2c.h>
#include <soc/grf.h>
@@ -55,6 +57,11 @@ void bootblock_mainboard_init(void)
udelay(100);/* Must wait for voltage to stabilize,2mV/us */
rkclk_configure_cpu();
+ if (rkclk_was_watchdog_reset()) {
+ printk(BIOS_INFO, "Last reset was watchdog... rebooting via GPIO!\n");
+ hard_reset();
+ }
+
/* i2c1 for tpm */
writel(IOMUX_I2C1, &rk3288_grf->iomux_i2c1);