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| author | Andrey Petrov <andrey.petrov@intel.com> | 2017-06-05 14:16:54 -0700 |
|---|---|---|
| committer | Aaron Durbin <adurbin@chromium.org> | 2017-07-12 23:22:27 +0000 |
| commit | 099f43a317a4e136667a31a4c65344c2a3191b39 (patch) | |
| tree | 65b28ae5de2c2fb056bf8ef51dfd980a8cdfef64 /src/mainboard/google/veyron_rialto | |
| parent | a00e10474a33387a46197ee1985da7bd9b6deb6f (diff) | |
| download | coreboot-099f43a317a4e136667a31a4c65344c2a3191b39.tar.xz | |
soc/intel/cannonlake: Add PCI dev macros and IDs
Change-Id: I287404f1615c6c0b441dd1b98a40e79919920a02
Signed-off-by: Andrey Petrov <andrey.petrov@intel.com>
Reviewed-on: https://review.coreboot.org/20072
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Aaron Durbin <adurbin@chromium.org>
Diffstat (limited to 'src/mainboard/google/veyron_rialto')
0 files changed, 0 insertions, 0 deletions