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authorFurquan Shaikh <furquan@google.com>2014-11-03 14:39:11 -0800
committerPatrick Georgi <pgeorgi@google.com>2015-07-07 20:07:13 +0200
commitd17a8623a54f40c3a8e0aab35859d8e18e73e4a0 (patch)
tree8fba7edd87a85b97f0823242d83ee7affb41bc2e /src/mainboard/google/veyron_romy
parent8e584aed2af173260ea6ed8bbe954a7763357810 (diff)
downloadcoreboot-d17a8623a54f40c3a8e0aab35859d8e18e73e4a0.tar.xz
rk3288: Use timestamp region for pre-cbmem timestamps
BUG=None BRANCH=None TEST=Compiles successfully for veyron_pinky Original-Change-Id: I3862e9bf2c32085c921adae4c1dcdf88ff0f3ff3 Original-Signed-off-by: Furquan Shaikh <furquan@google.com> Original-Reviewed-on: https://chromium-review.googlesource.com/227243 Original-Reviewed-by: Aaron Durbin <adurbin@chromium.org> Original-Commit-Queue: Furquan Shaikh <furquan@chromium.org> Original-Tested-by: Furquan Shaikh <furquan@chromium.org> (cherry picked from commit 0fabdbb05826160beb8ee8f89339b18a49e87ab8) Signed-off-by: Marc Jones <marc.jones@se-eng.com> Change-Id: I4504d29a43084d4bd406626899b25903200fa6d7 Reviewed-on: http://review.coreboot.org/10740 Reviewed-by: Aaron Durbin <adurbin@chromium.org> Tested-by: build bot (Jenkins)
Diffstat (limited to 'src/mainboard/google/veyron_romy')
-rw-r--r--src/mainboard/google/veyron_romy/romstage.c25
1 files changed, 6 insertions, 19 deletions
diff --git a/src/mainboard/google/veyron_romy/romstage.c b/src/mainboard/google/veyron_romy/romstage.c
index 9f7b1a5de8..f243235d7b 100644
--- a/src/mainboard/google/veyron_romy/romstage.c
+++ b/src/mainboard/google/veyron_romy/romstage.c
@@ -79,13 +79,7 @@ static void configure_l2ctlr(void)
void main(void)
{
-#if CONFIG_COLLECT_TIMESTAMPS
- uint64_t start_romstage_time;
- uint64_t before_dram_time;
- uint64_t after_dram_time;
- uint64_t base_time = timestamp_get();
- start_romstage_time = timestamp_get();
-#endif
+ timestamp_add_now(TS_START_ROMSTAGE);
console_init();
configure_l2ctlr();
@@ -93,13 +87,12 @@ void main(void)
/* vdd_log 1200mv is enough for ddr run 666Mhz */
regulate_vdd_log(1200);
-#if CONFIG_COLLECT_TIMESTAMPS
- before_dram_time = timestamp_get();
-#endif
+
+ timestamp_add_now(TS_BEFORE_INITRAM);
+
sdram_init(get_sdram_config());
-#if CONFIG_COLLECT_TIMESTAMPS
- after_dram_time = timestamp_get();
-#endif
+
+ timestamp_add_now(TS_AFTER_INITRAM);
/* Now that DRAM is up, add mappings for it and DMA coherency buffer. */
mmu_config_range((uintptr_t)_dram/MiB,
@@ -109,13 +102,7 @@ void main(void)
cbmem_initialize_empty();
-#if CONFIG_COLLECT_TIMESTAMPS
- timestamp_init(base_time);
- timestamp_add(TS_START_ROMSTAGE, start_romstage_time);
- timestamp_add(TS_BEFORE_INITRAM, before_dram_time);
- timestamp_add(TS_AFTER_INITRAM, after_dram_time);
timestamp_add_now(TS_END_ROMSTAGE);
-#endif
run_ramstage();
}