mb/google/volteer: Fix FPMCU pwr/rst gpio handling

1. No gpio control in bootblock
2. Power on and then deassert reset at the end of ramstage gpio
3. Disable power and assert reset when entering S5

On "reboot", the amount of time the power is disabled for is
equivalent to the amount of time between triggering #3 and wrapping
around to #2.

This change affects the following volteer variants that include an FPMCU:
  1. Drobit
  2. Eldrid
  3. Elemi
  4. Halvor
  5. Malefor
  6. Terrador
  7. Trondo
  8. Voema
  9. Volteer2
 10. Voxel

BUG=b:178094376
TEST=none

Change-Id: Ib51815349cea299907c10d6c56c27bd239e499e7
Signed-off-by: Nick Vaccaro <nvaccaro@google.com>
Reviewed-on: https://review.coreboot.org/c/coreboot/+/50828
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Duncan Laurie <dlaurie@chromium.org>
Reviewed-by: Tim Wawrzynczak <twawrzynczak@chromium.org>

1 files changed, 7 insertions, 0 deletions

diff --git a/src/mainboard/google/volteer/smihandler.c b/src/mainboard/google/volteer/smihandler.c
index adb60fedbe..7a0282549d 100644
--- a/src/mainboard/google/volteer/smihandler.c
+++ b/src/mainboard/google/volteer/smihandler.c
@@ -1,5 +1,6 @@
 /* SPDX-License-Identifier: GPL-2.0-or-later */
 
+#include <baseboard/variants.h>
 #include <cpu/x86/smm.h>
 #include <ec/google/chromeec/ec.h>
 #include <ec/google/chromeec/smm.h>
@@ -14,6 +15,12 @@ void mainboard_smi_espi_handler(void)
 
 void mainboard_smi_sleep(u8 slp_typ)
 {
+	const struct pad_config *pads;
+	size_t num;
+
+	pads = variant_sleep_gpio_table(slp_typ, &num);
+	gpio_configure_pads(pads, num);
+
 	chromeec_smi_sleep(slp_typ, MAINBOARD_EC_S3_WAKE_EVENTS,
 			MAINBOARD_EC_S5_WAKE_EVENTS);
 }