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author | Meera Ravindranath <meera.ravindranath@intel.com> | 2020-07-23 22:59:59 +0530 |
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committer | Patrick Georgi <pgeorgi@google.com> | 2020-07-27 05:10:24 +0000 |
commit | 2577407d03b47c3fe54243b5d8f945caef408e5c (patch) | |
tree | 41eade8dbd4be61829fccec3257a7ec978c8f954 /src/mainboard/google/volteer/variants/delbin/overridetree.cb | |
parent | 98b7033f07473ea07577135aaa6b1cf2770c44b1 (diff) | |
download | coreboot-2577407d03b47c3fe54243b5d8f945caef408e5c.tar.xz |
mb/google/dedede: Remove Rcomp resistor and target values
MRC automatically detects the DDR type and sets Rcomp resistor
and target values for JSL and does not require explicit programming.
Change-Id: Ia130765e2cb91d6a39ad00ebbab20e7e87fa42d1
Signed-off-by: Meera Ravindranath <meera.ravindranath@intel.com>
Reviewed-on: https://review.coreboot.org/c/coreboot/+/43761
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Angel Pons <th3fanbus@gmail.com>
Diffstat (limited to 'src/mainboard/google/volteer/variants/delbin/overridetree.cb')
0 files changed, 0 insertions, 0 deletions