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| author | Ravi Sarawadi <ravishankar.sarawadi@intel.com> | 2020-09-02 07:03:47 -0700 |
|---|---|---|
| committer | Patrick Georgi <pgeorgi@google.com> | 2020-09-14 07:09:11 +0000 |
| commit | 73cd3e704fde61e287f6fbdd6d371ed19e41f15d (patch) | |
| tree | 00c42fb4937c1924705987221a3bf7f8a8678d9f /src/mainboard/google/volteer/variants/delbin/overridetree.cb | |
| parent | 47c4bf557113f20f8fbf9878d44697694a99d439 (diff) | |
| download | coreboot-73cd3e704fde61e287f6fbdd6d371ed19e41f15d.tar.xz | |
mb/google/delbin: Configure DP_HPD as PAD_NC and disable DdiPortHpd
GPP_A19(DP_HPD1) and GPP_A20(DP_HPD2) were configured native function
(NF1) without internal pull-down which wrongly presents HPD interrupts.
DP_HPD had been removed for EVT design as those events are through eSPI.
This change configures GPP_A19 and GPP_A20 to be no connection and
disables DdiPort1Hpd and DdiPort2Hpd.
BUG=b:162566436
TEST=Booted to kernel and verified no kernel HPD pins assertion message
on Delbin board.
Signed-off-by: Ravi Sarawadi <ravishankar.sarawadi@intel.com>
Change-Id: Ifdef8ee438276678258b75d2fb70c6dfc7ee0a33
Reviewed-on: https://review.coreboot.org/c/coreboot/+/45031
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Caveh Jalali <caveh@chromium.org>
Diffstat (limited to 'src/mainboard/google/volteer/variants/delbin/overridetree.cb')
| -rw-r--r-- | src/mainboard/google/volteer/variants/delbin/overridetree.cb | 3 |
1 files changed, 3 insertions, 0 deletions
diff --git a/src/mainboard/google/volteer/variants/delbin/overridetree.cb b/src/mainboard/google/volteer/variants/delbin/overridetree.cb index fc549c75e1..05c8a34509 100644 --- a/src/mainboard/google/volteer/variants/delbin/overridetree.cb +++ b/src/mainboard/google/volteer/variants/delbin/overridetree.cb @@ -1,4 +1,7 @@ chip soc/intel/tigerlake + register "DdiPort1Hpd" = "0" + register "DdiPort2Hpd" = "0" + device domain 0 on device pci 15.0 on chip drivers/i2c/generic |