diff options
| author | Caveh Jalali <caveh@chromium.org> | 2020-06-30 03:13:07 -0700 |
|---|---|---|
| committer | Patrick Georgi <pgeorgi@google.com> | 2020-07-06 06:12:14 +0000 |
| commit | 6e62223f01bedd20628845f2c2dd0371715aa4aa (patch) | |
| tree | 68cb8d83107aa2c8cbbda411ff5d3ce670bec5ee /src/mainboard/google/volteer/variants/volteer | |
| parent | 11715d8dc6a2ee277ce90fea18bdeb445d4a8500 (diff) | |
| download | coreboot-6e62223f01bedd20628845f2c2dd0371715aa4aa.tar.xz | |
mb/google/volteer: Add support for passive USB-C daughterboard
The USB-C SBU and HSL orientation configuration depends on the USB
daughterboard used on the system. This patch adds an additional
configuration for supporting passive USB daughterboards using "probe"
directives to select the appropriate configuration at runtime.
BUG=b:158673460
TEST=verified active USB DBs enumerate at USB3 speeds in linux
Signed-off-by: Caveh Jalali <caveh@chromium.org>
Change-Id: Ia4bd97de8f974531f97469a5e47ecf4d948beca9
Reviewed-on: https://review.coreboot.org/c/coreboot/+/42905
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Tim Wawrzynczak <twawrzynczak@chromium.org>
Diffstat (limited to 'src/mainboard/google/volteer/variants/volteer')
| -rw-r--r-- | src/mainboard/google/volteer/variants/volteer/overridetree.cb | 15 |
1 files changed, 14 insertions, 1 deletions
diff --git a/src/mainboard/google/volteer/variants/volteer/overridetree.cb b/src/mainboard/google/volteer/variants/volteer/overridetree.cb index c32b80e9ec..577f7c8e84 100644 --- a/src/mainboard/google/volteer/variants/volteer/overridetree.cb +++ b/src/mainboard/google/volteer/variants/volteer/overridetree.cb @@ -156,7 +156,20 @@ chip soc/intel/tigerlake register "usb3_port_number" = "2" # SBU is fixed, HSL follows CC register "sbu_orientation" = "TYPEC_ORIENTATION_NORMAL" - device generic 1 on end + device generic 1 on + probe DB_USB USB4_GEN2 + probe DB_USB USB3_ACTIVE + probe DB_USB USB4_GEN3 + probe DB_USB USB3_NO_A + end + end + chip drivers/intel/pmc_mux/con + register "usb2_port_number" = "4" + register "usb3_port_number" = "2" + # SBU & HSL follow CC + device generic 1 on + probe DB_USB USB3_PASSIVE + end end end end |