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authorTim Wawrzynczak <twawrzynczak@chromium.org>2020-05-14 14:36:25 -0600
committerDuncan Laurie <dlaurie@chromium.org>2020-05-28 23:53:58 +0000
commit90e683b3071030c7f0f56b6bd52dc3bb0d3d9578 (patch)
tree4680d4b78fd8cfdcfe53ebcf5737861313c6acbe /src/mainboard/google/volteer/variants
parent3c93b7e166bb2bcaf1bf17754194604452628c28 (diff)
downloadcoreboot-90e683b3071030c7f0f56b6bd52dc3bb0d3d9578.tar.xz
mb/google/volteer: Add PMC.MUX.CONx devices to devicetree for Volteer
Volteer's MUX connections are known, and can now be described in ACPI tables. Port 1 has the only oddity, with SBU lines staying fixed in the CC1 orientation. TEST=Dump SSDT tables on Volteer, and confirm (coalesced for brevity): Scope (\_SB.PCI0.PMC) { Device (MUX) { Name (_HID, "INTC105C") Device (CON0) { Name (_ADR, 0) Name (_DSD, Package() { Package () { "usb2-port-number", 9 }, Package () { "usb3-port-number", 1 }, }) } Device (CON1) { Name (_ADR, 1) Name (_DSD, Package() { Package () { "usb2-port-number", 4 }, Package () { "usb3-port-number", 2 }, Package () { "sbu-orientation", "normal" }, ... } } } Change-Id: Id361b2df07e87ad72b6a59a686977b3f424e8ecf Signed-off-by: Tim Wawrzynczak <twawrzynczak@chromium.org> Reviewed-on: https://review.coreboot.org/c/coreboot/+/41414 Tested-by: build bot (Jenkins) <no-reply@coreboot.org> Reviewed-by: Duncan Laurie <dlaurie@chromium.org>
Diffstat (limited to 'src/mainboard/google/volteer/variants')
-rw-r--r--src/mainboard/google/volteer/variants/volteer/overridetree.cb21
1 files changed, 21 insertions, 0 deletions
diff --git a/src/mainboard/google/volteer/variants/volteer/overridetree.cb b/src/mainboard/google/volteer/variants/volteer/overridetree.cb
index aa2c8fb12f..d941f5fd2f 100644
--- a/src/mainboard/google/volteer/variants/volteer/overridetree.cb
+++ b/src/mainboard/google/volteer/variants/volteer/overridetree.cb
@@ -21,5 +21,26 @@ chip soc/intel/tigerlake
end
end
end
+ device pci 1f.2 hidden
+ # The pmc_mux chip driver is a placeholder for the
+ # PMC.MUX device in the ACPI hierarchy.
+ chip drivers/intel/pmc_mux
+ device generic 0 on
+ chip drivers/intel/pmc_mux/con
+ register "usb2_port_number" = "9"
+ register "usb3_port_number" = "1"
+ # SBU & HSL follow CC
+ device generic 0 on end
+ end
+ chip drivers/intel/pmc_mux/con
+ register "usb2_port_number" = "4"
+ register "usb3_port_number" = "2"
+ # SBU is fixed, HSL follows CC
+ register "sbu_orientation" = "TYPEC_ORIENTATION_NORMAL"
+ device generic 1 on end
+ end
+ end
+ end
+ end # PMC
end
end