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| author | Angel Pons <th3fanbus@gmail.com> | 2021-03-01 21:16:49 +0100 |
|---|---|---|
| committer | Patrick Georgi <pgeorgi@google.com> | 2021-03-03 09:02:03 +0000 |
| commit | 98521c51f473e3abc2bd0a7247e2a40c8d1e2711 (patch) | |
| tree | 202b3940178907219c6ee60240ba5809942db956 /src/mainboard/google/volteer | |
| parent | 68b447c2f8ed9b064ff3c915ae98ec8612d0ba3d (diff) | |
| download | coreboot-98521c51f473e3abc2bd0a7247e2a40c8d1e2711.tar.xz | |
soc/intel: Retype `CnviBtAudioOffload` devicetree option
The `FORCE_ENABLE` and `FORCE_DISABLE` names do not match what FSP UPDs
say, and can be confused with the `PchHdaTestPowerClockGating` UPD.
Replace the enum with a bool, and drop the confusing names. Note that
the enum for Ice Lake was incorrect, but no mainboards used the option.
Change-Id: I2c9b4c6a2f210ffca946ca196299fa672a06ccc7
Signed-off-by: Angel Pons <th3fanbus@gmail.com>
Reviewed-on: https://review.coreboot.org/c/coreboot/+/51154
Reviewed-by: Furquan Shaikh <furquan@google.com>
Reviewed-by: Tim Wawrzynczak <twawrzynczak@chromium.org>
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Diffstat (limited to 'src/mainboard/google/volteer')
| -rw-r--r-- | src/mainboard/google/volteer/variants/baseboard/devicetree.cb | 2 |
1 files changed, 1 insertions, 1 deletions
diff --git a/src/mainboard/google/volteer/variants/baseboard/devicetree.cb b/src/mainboard/google/volteer/variants/baseboard/devicetree.cb index 6a826c0bd2..825005e829 100644 --- a/src/mainboard/google/volteer/variants/baseboard/devicetree.cb +++ b/src/mainboard/google/volteer/variants/baseboard/devicetree.cb @@ -289,7 +289,7 @@ chip soc/intel/tigerlake register "tcc_offset" = "10" # TCC of 90 - register "CnviBtAudioOffload" = "FORCE_ENABLE" + register "CnviBtAudioOffload" = "true" # Intel Common SoC Config #+-------------------+---------------------------+ |