diff options
| author | Nick Vaccaro <nvaccaro@chromium.org> | 2017-12-28 20:28:20 -0800 |
|---|---|---|
| committer | Martin Roth <martinroth@google.com> | 2018-01-05 21:34:50 +0000 |
| commit | b331923c69fb15ca47bb89b1a08564532b83af22 (patch) | |
| tree | 671891a94a9c8b78a2c0edd50a2804e4ad3c486e /src/mainboard/google/zoombini/dsdt.asl | |
| parent | 7f61fb99d5b8db186a2893c2bd6807f6316f8a81 (diff) | |
| download | coreboot-b331923c69fb15ca47bb89b1a08564532b83af22.tar.xz | |
mainboard/google/zoombini: Add SoC acpi files to dsdt.asl
BUG=b:64395641
BRANCH=None
TEST=Verify "./util/abuild/abuild -p none -t google/zoombini -x -a"
compiles successfully.
Change-Id: I417a1c606e4968120414af57aa3b17d5c3b3cad0
Signed-off-by: Nick Vaccaro <nvaccaro@chromium.org>
Reviewed-on: https://review.coreboot.org/23035
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Furquan Shaikh <furquan@google.com>
Reviewed-by: Paul Menzel <paulepanter@users.sourceforge.net>
Diffstat (limited to 'src/mainboard/google/zoombini/dsdt.asl')
| -rw-r--r-- | src/mainboard/google/zoombini/dsdt.asl | 11 |
1 files changed, 11 insertions, 0 deletions
diff --git a/src/mainboard/google/zoombini/dsdt.asl b/src/mainboard/google/zoombini/dsdt.asl index b1faad6ecc..c50a79ae42 100644 --- a/src/mainboard/google/zoombini/dsdt.asl +++ b/src/mainboard/google/zoombini/dsdt.asl @@ -24,14 +24,25 @@ DefinitionBlock( 0x20110725 // OEM revision ) { + // Some generic macros + #include <soc/intel/cannonlake/acpi/platform.asl> + // global NVS and variables #include <soc/intel/cannonlake/acpi/globalnvs.asl> Scope (\_SB) { + Device (PCI0) + { + #include <soc/intel/cannonlake/acpi/northbridge.asl> + #include <soc/intel/cannonlake/acpi/southbridge.asl> + } } #if IS_ENABLED(CONFIG_CHROMEOS) // Chrome OS specific #include <vendorcode/google/chromeos/acpi/chromeos.asl> #endif + + // Chipset specific sleep states + #include <soc/intel/cannonlake/acpi/sleepstates.asl> } |