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author | Sathyanarayana Nujella <sathyanarayana.nujella@intel.com> | 2018-01-19 10:23:05 -0800 |
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committer | Patrick Georgi <pgeorgi@google.com> | 2018-02-22 09:57:30 +0000 |
commit | 206821ee2f4ecae68fb292d0075bb82acac0c8bb (patch) | |
tree | 7a597f1bf56bd1fee104c0c050efd4d2b0153af2 /src/mainboard/google/zoombini/mainboard.c | |
parent | 416ded8dc19ed91440536b4eac0d6fc5af60365a (diff) | |
download | coreboot-206821ee2f4ecae68fb292d0075bb82acac0c8bb.tar.xz |
mainboard/google/zoombini: Add config for meowth audio
Add NHLT and dt support for meowth with max98373 amp.
BUG=b:71724897
TEST='emerge-meowth coreboot' compiles correctly
TEST=check SSDT and verify entries for max98373
TEST=check NHLT ACPI tables included blobs for max98373
Change-Id: Ic89bf669c7ab2ef39ce64e4da6a57a7069ee75f9
Signed-off-by: Sathyanarayana Nujella <sathyanarayana.nujella@intel.com>
Signed-off-by: Lijian Zhao <lijian.zhao@intel.com>
Reviewed-on: https://review.coreboot.org/23334
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Nick Vaccaro <nvaccaro@google.com>
Diffstat (limited to 'src/mainboard/google/zoombini/mainboard.c')
-rw-r--r-- | src/mainboard/google/zoombini/mainboard.c | 29 |
1 files changed, 28 insertions, 1 deletions
diff --git a/src/mainboard/google/zoombini/mainboard.c b/src/mainboard/google/zoombini/mainboard.c index 262e823667..eee2d74d45 100644 --- a/src/mainboard/google/zoombini/mainboard.c +++ b/src/mainboard/google/zoombini/mainboard.c @@ -16,17 +16,44 @@ #include <device/device.h> #include <ec/ec.h> #include <vendorcode/google/chromeos/chromeos.h> +#include <nhlt.h> +#include <arch/acpi.h> +#include <baseboard/variants.h> static void mainboard_init(device_t dev) { mainboard_ec_init(); } +static unsigned long mainboard_write_acpi_tables(device_t device, + unsigned long current, acpi_rsdp_t *rsdp) +{ + uintptr_t start_addr; + uintptr_t end_addr; + struct nhlt *nhlt; + + start_addr = current; + + nhlt = nhlt_init(); + + if (nhlt == NULL) + return start_addr; + + variant_nhlt_init(nhlt); + + end_addr = nhlt_soc_serialize(nhlt, start_addr); + + if (end_addr != start_addr) + acpi_add_table(rsdp, (void *)start_addr); + + return end_addr; +} + static void mainboard_enable(device_t dev) { dev->ops->init = mainboard_init; dev->ops->acpi_inject_dsdt_generator = chromeos_dsdt_generator; - dev->ops->write_acpi_tables = NULL; + dev->ops->write_acpi_tables = mainboard_write_acpi_tables; } struct chip_operations mainboard_ops = { |