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author | Rob Barnes <robbarnes@google.com> | 2020-09-25 14:16:46 -0600 |
---|---|---|
committer | Furquan Shaikh <furquan@google.com> | 2020-10-14 04:47:39 +0000 |
commit | d1095c7ed79d7bed958c6e446fe4ea2def5c2102 (patch) | |
tree | f6353842fd314eba14621e31d9aa67514cd3a635 /src/mainboard/google/zork/variants/baseboard/devicetree_trembyle.cb | |
parent | 0aed4e577df03a3c9c790fddebb1a9c413a0abcb (diff) | |
download | coreboot-d1095c7ed79d7bed958c6e446fe4ea2def5c2102.tar.xz |
mb/google/zork: Enable wake on wireless lan
Add generic wifi ACPI entry for wake on lan event.
Change configuration of GPIO 2/WIFI_PCIE_WAKE_ODL to SCI.
BUG=b:162605108
TEST=$ iw phy phy0 wowlan enable disconnect
$ cat /proc/acpi/wakeup | grep WF
WF00 S3 *enabled pci:0000:01:00.0
$ powerd_dbus_suspend
Reboot wifi router, DUT wakes up
BRANCH=zork
Change-Id: Idbeb2cfbc4995b8382ffc26cbe7b53764fc9252d
Signed-off-by: Rob Barnes <robbarnes@google.com>
Reviewed-on: https://review.coreboot.org/c/coreboot/+/45745
Reviewed-by: Furquan Shaikh <furquan@google.com>
Reviewed-by: Michael Niewöhner <foss@mniewoehner.de>
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Diffstat (limited to 'src/mainboard/google/zork/variants/baseboard/devicetree_trembyle.cb')
-rw-r--r-- | src/mainboard/google/zork/variants/baseboard/devicetree_trembyle.cb | 7 |
1 files changed, 6 insertions, 1 deletions
diff --git a/src/mainboard/google/zork/variants/baseboard/devicetree_trembyle.cb b/src/mainboard/google/zork/variants/baseboard/devicetree_trembyle.cb index 7288d6e32d..3ab70a2945 100644 --- a/src/mainboard/google/zork/variants/baseboard/devicetree_trembyle.cb +++ b/src/mainboard/google/zork/variants/baseboard/devicetree_trembyle.cb @@ -210,7 +210,12 @@ chip soc/amd/picasso device pci 0.2 on end # IOMMU device pci 1.0 on end # Dummy Host Bridge, must be enabled device pci 1.1 off end # GPP Bridge 0 - device pci 1.2 on end # GPP Bridge 1 - Wifi + device pci 1.2 on # GPP Bridge 1 - Wifi + chip drivers/wifi/generic + register "wake" = "GEVENT_8" + device pci 00.0 on end + end + end device pci 1.3 on end # GPP Bridge 2 - SD device pci 1.4 off end # GPP Bridge 3 device pci 1.5 off end # GPP Bridge 4 |