diff options
author | Furquan Shaikh <furquan@google.com> | 2020-06-18 01:06:04 -0700 |
---|---|---|
committer | Furquan Shaikh <furquan@google.com> | 2020-06-25 08:07:39 +0000 |
commit | 8ae77f62cc46232459effd4c835d71959791396e (patch) | |
tree | 163a3cfa8d860dd1822ead2de400b10c38199776 /src/mainboard/google/zork/variants/baseboard | |
parent | 996fdc0057d02c23e120341d47e70ce06860507f (diff) | |
download | coreboot-8ae77f62cc46232459effd4c835d71959791396e.tar.xz |
mb/google/zork: Update _v3 romstage and wifi GPIO tables for trembyle
This change updates _v3 version of romstage and wifi GPIO tables to
match v3 schematics.
BUG=b:157088093, b:154676993, b:157098434
TEST=Compiles
Signed-off-by: Martin Roth <martinroth@chromium.org>
Signed-off-by: Furquan Shaikh <furquan@google.com>
Change-Id: Ic605559b3226e2ad9b5b3f3fa45c4aa9f9b5fe22
Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/third_party/coreboot/+/2251391
Reviewed-by: Aaron Durbin <adurbin@google.com>
Commit-Queue: Furquan Shaikh <furquan@chromium.org>
Tested-by: Furquan Shaikh <furquan@chromium.org>
Reviewed-on: https://review.coreboot.org/c/coreboot/+/42722
Reviewed-by: Aaron Durbin <adurbin@chromium.org>
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Diffstat (limited to 'src/mainboard/google/zork/variants/baseboard')
-rw-r--r-- | src/mainboard/google/zork/variants/baseboard/gpio_baseboard_trembyle.c | 10 |
1 files changed, 5 insertions, 5 deletions
diff --git a/src/mainboard/google/zork/variants/baseboard/gpio_baseboard_trembyle.c b/src/mainboard/google/zork/variants/baseboard/gpio_baseboard_trembyle.c index 2c87a0f21f..fad8a53d3e 100644 --- a/src/mainboard/google/zork/variants/baseboard/gpio_baseboard_trembyle.c +++ b/src/mainboard/google/zork/variants/baseboard/gpio_baseboard_trembyle.c @@ -50,6 +50,8 @@ static const struct soc_amd_gpio gpio_set_wifi_pre_v3[] = { static const struct soc_amd_gpio gpio_set_stage_rom_v3[] = { /* PEN_POWER_EN - reset */ PAD_GPO(GPIO_5, LOW), + /* EN_PWR_TOUCHPAD_PS2 - reset */ + PAD_GPO(GPIO_13, LOW), /* EC_FCH_WAKE_L */ PAD_GPI(GPIO_24, PULL_UP), PAD_WAKE(GPIO_24, PULL_UP, EDGE_LOW, S3_S4_S5), @@ -60,14 +62,12 @@ static const struct soc_amd_gpio gpio_set_stage_rom_v3[] = { PAD_NF(GPIO_27, PCIE_RST1_L, PULL_NONE), /* NVME_AUX_RESET_L */ PAD_GPO(GPIO_40, HIGH), - /* WIFI_AUX_RESET_L */ - PAD_GPO(GPIO_42, HIGH), - /* EN_PWR_TOUCHPAD_PS2 - reset */ - PAD_GPO(GPIO_67, LOW), /* EMMC_RESET - reset (default stuffing unused)*/ PAD_GPO(GPIO_68, HIGH), /* EN_PWR_CAMERA - reset */ PAD_GPO(GPIO_76, LOW), + /* WIFI_AUX_RESET_L */ + PAD_GPO(GPIO_86, HIGH), /* CLK_REQ0_L - WIFI */ PAD_NF(GPIO_92, CLK_REQ0_L, PULL_UP), /* CLK_REQ1_L - SD Card */ @@ -84,7 +84,7 @@ static const struct soc_amd_gpio gpio_set_stage_rom_v3[] = { static const struct soc_amd_gpio gpio_set_wifi_v3[] = { /* EN_PWR_WIFI */ - PAD_GPO(GPIO_29, HIGH), + PAD_GPO(GPIO_42, HIGH), }; static const struct soc_amd_gpio gpio_set_stage_ram[] = { |