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authorFelix Held <felix-coreboot@felixheld.de>2020-08-07 17:07:15 +0200
committerFelix Held <felix-coreboot@felixheld.de>2020-08-08 19:58:58 +0000
commitca55343b76cda66d5be1dea9eb2be3fbee901ea7 (patch)
treea65752637ad3cfb7f682c7edff8b1a47bdb9d36a /src/mainboard/google/zork/variants/trembyle/overridetree.cb
parente21866781f73dfa468ce5da3db7e86b39e2bb4d8 (diff)
downloadcoreboot-ca55343b76cda66d5be1dea9eb2be3fbee901ea7.tar.xz
mb/google/zork/trembyle: comment why USB OC pin mapping is different
Change-Id: I68b7529733e604ac45919a54e094be7eeb044458 Signed-off-by: Felix Held <felix-coreboot@felixheld.de> Reviewed-on: https://review.coreboot.org/c/coreboot/+/44291 Tested-by: build bot (Jenkins) <no-reply@coreboot.org> Reviewed-by: Aaron Durbin <adurbin@chromium.org> Reviewed-by: Angel Pons <th3fanbus@gmail.com>
Diffstat (limited to 'src/mainboard/google/zork/variants/trembyle/overridetree.cb')
-rw-r--r--src/mainboard/google/zork/variants/trembyle/overridetree.cb2
1 files changed, 1 insertions, 1 deletions
diff --git a/src/mainboard/google/zork/variants/trembyle/overridetree.cb b/src/mainboard/google/zork/variants/trembyle/overridetree.cb
index fb922b9de3..39b4fcb70b 100644
--- a/src/mainboard/google/zork/variants/trembyle/overridetree.cb
+++ b/src/mainboard/google/zork/variants/trembyle/overridetree.cb
@@ -22,7 +22,7 @@ chip soc/amd/picasso
# End : OPN Performance Configuration
- # USB OC pin mapping
+ # USB OC pin mapping: existing trembyle boards are based on old schematics version
register "usb_port_overcurrent_pin[0]" = "USB_OC_PIN_0" # USB C0
register "usb_port_overcurrent_pin[1]" = "USB_OC_PIN_2" # USB A0
register "usb_port_overcurrent_pin[2]" = "USB_OC_PIN_4" # USB A1