diff options
author | Raul E Rangel <rrangel@chromium.org> | 2020-05-20 14:07:41 -0600 |
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committer | Martin Roth <martinroth@google.com> | 2020-05-27 23:18:12 +0000 |
commit | b3c41329fdca84a251c183bbc2b0767978e9d96f (patch) | |
tree | 47003eae89ad4f6dd86edb52b1fe203d7e7b14b5 /src/mainboard/google/zork/verstage.c | |
parent | fc9b8b916f7bc0c6ac1579b915937ed23ea3327a (diff) | |
download | coreboot-b3c41329fdca84a251c183bbc2b0767978e9d96f.tar.xz |
mb/google/zork: Add Picasso based Zork mainboard and variants
This is a copy of the mb/google/zork directory from the chromiumos
coreboot-zork branch. This was from commit 29308ac8606.
See https://chromium.googlesource.com/chromiumos/third_party/coreboot/+/29308ac8606/src/mainboard/google/zork
Changes:
* Minor changes to make the board build.
* Add bootblock.c.
* Modify romstage.c
* Removed the FSP_X configs from zork/Kconfig since they should be
set in picasso/Kconfig. picasso/Kconfig doesn't currently define the
binaries since they haven't been published. To get a working build
a custom config that sets FSP_X_FILE is required.
BUG=b:157140753
TEST=Build trembyle and boot to OS
Signed-off-by: Raul E Rangel <rrangel@chromium.org>
Change-Id: I3933fa54e3f603985a0818852a1c77d8e248484f
Reviewed-on: https://review.coreboot.org/c/coreboot/+/41581
Reviewed-by: Furquan Shaikh <furquan@google.com>
Reviewed-by: Martin Roth <martinroth@google.com>
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Diffstat (limited to 'src/mainboard/google/zork/verstage.c')
-rw-r--r-- | src/mainboard/google/zork/verstage.c | 35 |
1 files changed, 35 insertions, 0 deletions
diff --git a/src/mainboard/google/zork/verstage.c b/src/mainboard/google/zork/verstage.c new file mode 100644 index 0000000000..7bfc10782a --- /dev/null +++ b/src/mainboard/google/zork/verstage.c @@ -0,0 +1,35 @@ +/* SPDX-License-Identifier: GPL-2.0-or-later */ + +#include <amdblocks/gpio_banks.h> +#include <baseboard/variants.h> +#include <console/console.h> +#include <security/vboot/vboot_common.h> +#include <soc/southbridge.h> + +static void setup_gpio(void) +{ + const struct soc_amd_gpio *gpios; + size_t num_gpios; + + printk(BIOS_DEBUG, "Setting GPIOs\n"); + gpios = variant_romstage_gpio_table(&num_gpios); + program_gpios(gpios, num_gpios); + printk(BIOS_DEBUG, "GPIOs setup\n"); +} + +static void setup_i2c(void) +{ + printk(BIOS_DEBUG, "Setting up i2c\n"); + i2c_soc_early_init(); + printk(BIOS_DEBUG, "i2c setup\n"); +} + +void verstage_mainboard_early_init(void) +{ + setup_gpio(); +} + +void verstage_mainboard_init(void) +{ + setup_i2c(); +} |