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authorFurquan Shaikh <furquan@google.com>2020-07-14 12:39:13 -0700
committerAaron Durbin <adurbin@chromium.org>2020-07-16 16:38:55 +0000
commiteb912ed9adbef056f01a9278cc98745ea5a6dbf0 (patch)
treeca39f34e10ac042925789d251f92a671236c10a2 /src/mainboard/google/zork
parent19a2a2db7e46fd774cfd70893d141c82c7906d76 (diff)
downloadcoreboot-eb912ed9adbef056f01a9278cc98745ea5a6dbf0.tar.xz
mb/google/zork: Keep USI_RST asserted in ramstage
This change keeps USI_RST(GPIO_140) asserted in ramstage since it gets deasserted by OS using ACPI methods. BUG=b:160854397 Signed-off-by: Furquan Shaikh <furquan@google.com> Change-Id: I8feced788e471a0efb2358d42b2146df04fb7a0c Reviewed-on: https://review.coreboot.org/c/coreboot/+/43461 Reviewed-by: Raul Rangel <rrangel@chromium.org> Reviewed-by: Aaron Durbin <adurbin@chromium.org> Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Diffstat (limited to 'src/mainboard/google/zork')
-rw-r--r--src/mainboard/google/zork/variants/baseboard/gpio_baseboard_dalboz.c2
-rw-r--r--src/mainboard/google/zork/variants/baseboard/gpio_baseboard_trembyle.c2
2 files changed, 2 insertions, 2 deletions
diff --git a/src/mainboard/google/zork/variants/baseboard/gpio_baseboard_dalboz.c b/src/mainboard/google/zork/variants/baseboard/gpio_baseboard_dalboz.c
index 4d8631ee6e..44779ea932 100644
--- a/src/mainboard/google/zork/variants/baseboard/gpio_baseboard_dalboz.c
+++ b/src/mainboard/google/zork/variants/baseboard/gpio_baseboard_dalboz.c
@@ -166,7 +166,7 @@ static const struct soc_amd_gpio gpio_set_stage_ram[] = {
/* DEV_BEEP_BCLK */
PAD_GPI(GPIO_139, PULL_NONE),
/* USI_RESET */
- PAD_GPO(GPIO_140, LOW),
+ PAD_GPO(GPIO_140, HIGH),
/* USB_HUB_RST_L */
PAD_GPO(GPIO_141, HIGH),
/* BT_DISABLE */
diff --git a/src/mainboard/google/zork/variants/baseboard/gpio_baseboard_trembyle.c b/src/mainboard/google/zork/variants/baseboard/gpio_baseboard_trembyle.c
index 95e1a72ca1..fc6ca2026c 100644
--- a/src/mainboard/google/zork/variants/baseboard/gpio_baseboard_trembyle.c
+++ b/src/mainboard/google/zork/variants/baseboard/gpio_baseboard_trembyle.c
@@ -158,7 +158,7 @@ static const struct soc_amd_gpio gpio_set_stage_ram[] = {
/* DEV_BEEP_BCLK */
PAD_GPI(GPIO_139, PULL_NONE),
/* USI_RESET */
- PAD_GPO(GPIO_140, LOW),
+ PAD_GPO(GPIO_140, HIGH),
/* UART1_RXD - FPMCU */
PAD_NF(GPIO_141, UART1_RXD, PULL_NONE),
/* UART1_TXD - FPMCU */