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authorSheng-Liang Pan <Sheng-Liang.Pan@quantatw.com>2018-02-27 20:40:16 +0800
committerMartin Roth <martinroth@google.com>2018-03-01 16:07:35 +0000
commit06e3e1f055593bd2e2906f43040a703bc471cde4 (patch)
tree9d27220aaaf0abee1bc1aeebaf90aea1e3e40613 /src/mainboard/google
parent23cff8bf50c696c2dde812d4be7fa0ebfb3892ed (diff)
downloadcoreboot-06e3e1f055593bd2e2906f43040a703bc471cde4.tar.xz
mb/google/coral: add usb2 phy setting override for some variants
Due to there are some chances USB devices can not be detected. USB2 port#1 and #4 PHY register need to be overridden for variants Santa/Lava/Blue/Bruce/Astronaut. port#1: PERPORTPETXISET = 4 PERPORTTXISET = 4 IUSBTXEMPHASISEN= 1 PERPORTTXPEHALF= 0 port#4: PERPORTPETXISET = 7 PERPORTTXISET = 7 IUSBTXEMPHASISEN= 1 PERPORTTXPEHALF= 0 BUG=b:72623892 BRANCH=master TEST=emerge-coral coreboot chromeos-bootimage Change-Id: I401905685cc3078df657919b162272c3de320296 Signed-off-by: Pan Sheng-Liang <Sheng-Liang.Pan@quantatw.com> Reviewed-on: https://review.coreboot.org/23881 Tested-by: build bot (Jenkins) <no-reply@coreboot.org> Reviewed-by: Aaron Durbin <adurbin@chromium.org>
Diffstat (limited to 'src/mainboard/google')
-rw-r--r--src/mainboard/google/reef/variants/coral/mainboard.c69
1 files changed, 56 insertions, 13 deletions
diff --git a/src/mainboard/google/reef/variants/coral/mainboard.c b/src/mainboard/google/reef/variants/coral/mainboard.c
index a45afc7070..311c71a3ab 100644
--- a/src/mainboard/google/reef/variants/coral/mainboard.c
+++ b/src/mainboard/google/reef/variants/coral/mainboard.c
@@ -28,8 +28,13 @@ enum {
SKU_3_SANTA = 3,
SKU_4_LAVA = 4,
SKU_5_LAVA = 5,
+ SKU_6_BLUE = 6,
+ SKU_7_BLUE = 7,
+ SKU_8_BRUCE = 8,
SKU_9_LAVA = 9,
SKU_10_LAVA = 10,
+ SKU_11_BRUCE = 11,
+ SKU_12_BLUE = 12,
SKU_61_ASTRONAUT = 61,
SKU_62_ASTRONAUT = 62,
SKU_160_NASHER = 160,
@@ -71,25 +76,63 @@ void mainboard_devtree_update(struct device *dev)
switch (sku_id) {
case SKU_0_ASTRONAUT:
case SKU_1_ASTRONAUT:
- cfg->usb2eye[1].Usb20PerPortPeTxiSet = 7;
- cfg->usb2eye[1].Usb20PerPortTxiSet = 2;
- break;
+ case SKU_61_ASTRONAUT:
+ case SKU_62_ASTRONAUT:
+ cfg->usb2eye[1].Usb20PerPortPeTxiSet = 4;
+ cfg->usb2eye[1].Usb20PerPortTxiSet = 4;
+ cfg->usb2eye[1].Usb20IUsbTxEmphasisEn = 1;
+ cfg->usb2eye[1].Usb20PerPortTxPeHalf = 0;
+ cfg->usb2eye[4].Usb20PerPortPeTxiSet = 7;
+ cfg->usb2eye[4].Usb20PerPortTxiSet = 7;
+ cfg->usb2eye[4].Usb20IUsbTxEmphasisEn = 1;
+ cfg->usb2eye[4].Usb20PerPortTxPeHalf = 0;
+ break;
case SKU_2_SANTA:
case SKU_3_SANTA:
- cfg->usb2eye[1].Usb20PerPortPeTxiSet = 7;
- cfg->usb2eye[1].Usb20PerPortTxiSet = 2;
- break;
+ cfg->usb2eye[1].Usb20PerPortPeTxiSet = 4;
+ cfg->usb2eye[1].Usb20PerPortTxiSet = 4;
+ cfg->usb2eye[1].Usb20IUsbTxEmphasisEn = 1;
+ cfg->usb2eye[1].Usb20PerPortTxPeHalf = 0;
+ cfg->usb2eye[4].Usb20PerPortPeTxiSet = 7;
+ cfg->usb2eye[4].Usb20PerPortTxiSet = 7;
+ cfg->usb2eye[4].Usb20IUsbTxEmphasisEn = 1;
+ cfg->usb2eye[4].Usb20PerPortTxPeHalf = 0;
+ break;
case SKU_4_LAVA:
case SKU_5_LAVA:
case SKU_9_LAVA:
case SKU_10_LAVA:
- cfg->usb2eye[1].Usb20PerPortPeTxiSet = 7;
- cfg->usb2eye[1].Usb20PerPortTxiSet = 2;
- break;
- case SKU_61_ASTRONAUT:
- case SKU_62_ASTRONAUT:
- cfg->usb2eye[1].Usb20PerPortPeTxiSet = 7;
- cfg->usb2eye[1].Usb20PerPortTxiSet = 5;
+ cfg->usb2eye[1].Usb20PerPortPeTxiSet = 4;
+ cfg->usb2eye[1].Usb20PerPortTxiSet = 4;
+ cfg->usb2eye[1].Usb20IUsbTxEmphasisEn = 1;
+ cfg->usb2eye[1].Usb20PerPortTxPeHalf = 0;
+ cfg->usb2eye[4].Usb20PerPortPeTxiSet = 7;
+ cfg->usb2eye[4].Usb20PerPortTxiSet = 7;
+ cfg->usb2eye[4].Usb20IUsbTxEmphasisEn = 1;
+ cfg->usb2eye[4].Usb20PerPortTxPeHalf = 0;
+ break;
+ case SKU_6_BLUE:
+ case SKU_7_BLUE:
+ case SKU_12_BLUE:
+ cfg->usb2eye[1].Usb20PerPortPeTxiSet = 4;
+ cfg->usb2eye[1].Usb20PerPortTxiSet = 4;
+ cfg->usb2eye[1].Usb20IUsbTxEmphasisEn = 1;
+ cfg->usb2eye[1].Usb20PerPortTxPeHalf = 0;
+ cfg->usb2eye[4].Usb20PerPortPeTxiSet = 7;
+ cfg->usb2eye[4].Usb20PerPortTxiSet = 7;
+ cfg->usb2eye[4].Usb20IUsbTxEmphasisEn = 1;
+ cfg->usb2eye[4].Usb20PerPortTxPeHalf = 0;
+ break;
+ case SKU_8_BRUCE:
+ case SKU_11_BRUCE:
+ cfg->usb2eye[1].Usb20PerPortPeTxiSet = 4;
+ cfg->usb2eye[1].Usb20PerPortTxiSet = 4;
+ cfg->usb2eye[1].Usb20IUsbTxEmphasisEn = 1;
+ cfg->usb2eye[1].Usb20PerPortTxPeHalf = 0;
+ cfg->usb2eye[4].Usb20PerPortPeTxiSet = 7;
+ cfg->usb2eye[4].Usb20PerPortTxiSet = 7;
+ cfg->usb2eye[4].Usb20IUsbTxEmphasisEn = 1;
+ cfg->usb2eye[4].Usb20PerPortTxPeHalf = 0;
break;
default:
break;