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author | Sheng-Liang Pan <Sheng-Liang.Pan@quantatw.com> | 2017-10-31 11:15:24 +0800 |
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committer | Aaron Durbin <adurbin@chromium.org> | 2017-11-01 16:25:34 +0000 |
commit | 19ba2e02108f8cdae6000b162714b788d599cbcb (patch) | |
tree | 4b52ac21683cd878404169facd9dbefafa39d3d4 /src/mainboard/google | |
parent | 68c71182665d4e08bd1141dc9147044973e7d88f (diff) | |
download | coreboot-19ba2e02108f8cdae6000b162714b788d599cbcb.tar.xz |
mainboard/google/coral: Update touchscreen device ACPI nodes
For Raydium, export reset GPIO as well as PowerResource.
Let EN_PP3300_TOUCHSCREEN signal will goes to low at S3 mode.
BUG=b:67879912
BRANCH=coral
TEST=emerge-coral coreboot
Change-Id: Ibf501b40ecfc957fd8be7ebffd2357dfa0e07757
Signed-off-by: Pan Sheng-Liang <Sheng-Liang.Pan@quantatw.com>
Reviewed-on: https://review.coreboot.org/22252
Reviewed-by: Furquan Shaikh <furquan@google.com>
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Diffstat (limited to 'src/mainboard/google')
-rw-r--r-- | src/mainboard/google/reef/variants/coral/devicetree.cb | 5 |
1 files changed, 5 insertions, 0 deletions
diff --git a/src/mainboard/google/reef/variants/coral/devicetree.cb b/src/mainboard/google/reef/variants/coral/devicetree.cb index b82197a5c6..0a06c76779 100644 --- a/src/mainboard/google/reef/variants/coral/devicetree.cb +++ b/src/mainboard/google/reef/variants/coral/devicetree.cb @@ -193,6 +193,11 @@ chip soc/intel/apollolake register "desc" = ""Raydium Touchscreen"" register "irq" = "ACPI_IRQ_EDGE_LOW(GPIO_21_IRQ)" register "probed" = "1" + register "reset_gpio" = "ACPI_GPIO_OUTPUT_ACTIVE_HIGH(GPIO_36)" + register "reset_delay_ms" = "1" + register "enable_gpio" = "ACPI_GPIO_OUTPUT_ACTIVE_HIGH(GPIO_152)" + register "enable_delay_ms" = "50" + register "has_power_resource" = "1" device i2c 39 on end end end # - I2C 3 |